[llvm] Reapply "[AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and … (PR #149262)

[Jun Wang via llvm-commits]

jwanggit86 wrote:

Redo [PR 142188](https://github.com/llvm/llvm-project/pull/142188). One case that's not covered by PR 142188 is the instruction selection pattern for the intrinsic int_amdgcn_alignbyte for GFX10. This caused the intrinsic to be mapped to V_ALIGNBYTE_B32_e64 during instruction selection, which is incorrect. This PR fixes this problem.

https://github.com/llvm/llvm-project/pull/149262