[llvm] c4d4e76 - [RISCV] Pre-commit RVV instructions to the x60 scheduling model and tests
Mikhail R. Gadelha via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 16 11:49:38 PDT 2025
Author: Mikhail R. Gadelha
Date: 2025-07-16T15:48:37-03:00
New Revision: c4d4e761ef27d6dd27323cf3efa506db5e9e3457
URL: https://github.com/llvm/llvm-project/commit/c4d4e761ef27d6dd27323cf3efa506db5e9e3457
DIFF: https://github.com/llvm/llvm-project/commit/c4d4e761ef27d6dd27323cf3efa506db5e9e3457.diff
LOG: [RISCV] Pre-commit RVV instructions to the x60 scheduling model and tests
Added:
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mask.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-reduction.s
Modified:
llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/atomic.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/floating-point.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/integer.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index 05388f2d13113..3e286a754e4ee 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -13,6 +13,17 @@
//
//===----------------------------------------------------------------------===//
+class SMX60IsWorstCaseMX<string mx, list<string> MxList> {
+ string LLMUL = LargestLMUL<MxList>.r;
+ bit c = !eq(mx, LLMUL);
+}
+
+class SMX60IsWorstCaseMXSEW<string mx, int sew, list<string> MxList, bit isF = 0> {
+ string LLMUL = LargestLMUL<MxList>.r;
+ int SSEW = SmallestSEW<mx, isF>.r;
+ bit c = !and(!eq(mx, LLMUL), !eq(sew, SSEW));
+}
+
def SpacemitX60Model : SchedMachineModel {
let IssueWidth = 2; // dual-issue
let MicroOpBufferSize = 0; // in-order
@@ -44,6 +55,19 @@ let BufferSize = 0 in {
// floating point instructions, this model assumes single issue as
// increasing it reduces the gains we saw in performance
def SMX60_FP : ProcResource<1>;
+
+ // Vector pipeline
+ // Single issue for vector store/load instructions
+ def SMX60_VLS : ProcResource<1>;
+
+ // The C908 user manual says: "Vector floating-point units support vector
+ // floating-point computation of
diff erent bits. In addition, vector integer
+ // units are added". Developer confirmed it's a separate VIEU
+ def SMX60_VIEU : ProcResource<1>;
+
+ // The C908 user manual says: "The vector execution unit is developed by
+ // extending the floating-point unit", so let's assume single issue for now
+ def SMX60_VFP : ProcResource<1>;
}
//===----------------------------------------------------------------------===//
@@ -232,9 +256,341 @@ let Latency = 4 in {
def : WriteRes<WriteFMovI32ToF32, [SMX60_IEU]>;
}
+// 6. Configuration-Setting Instructions
+def : WriteRes<WriteVSETVLI, [SMX60_IEUA]>;
+def : WriteRes<WriteVSETIVLI, [SMX60_IEUA]>;
+def : WriteRes<WriteVSETVL, [SMX60_IEUA]>;
+
+// 7. Vector Loads and Stores
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ // Unit-stride loads and stores
+ defm "" : LMULWriteResMX<"WriteVLDE", [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVLDFF", [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSTE", [SMX60_VLS], mx, IsWorstCase>;
+
+ // Mask loads and stores
+ defm "" : LMULWriteResMX<"WriteVLDM", [SMX60_VLS], mx, IsWorstCase=!eq(mx, "M1")>;
+ defm "" : LMULWriteResMX<"WriteVSTM", [SMX60_VLS], mx, IsWorstCase=!eq(mx, "M1")>;
+
+ // Strided and indexed loads and stores
+ foreach eew = [8, 16, 32, 64] in {
+ defm "" : LMULWriteResMX<"WriteVLDS" # eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVLDUX" # eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVLDOX" # eew, [SMX60_VLS], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVSTS" # eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSTUX" # eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSTOX" # eew, [SMX60_VLS], mx, IsWorstCase>;
+ }
+}
+
+// Segmented loads and stores
+foreach mx = SchedMxList in {
+ foreach nf=2-8 in {
+ foreach eew = [8, 16, 32, 64] in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ // Unit-stride segmented
+ defm "" : LMULWriteResMX<"WriteVLSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVLSEGFF" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+
+ // Strided/indexed segmented
+ defm "" : LMULWriteResMX<"WriteVLSSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSSSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+
+ // Indexed segmented
+ defm "" : LMULWriteResMX<"WriteVLOXSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVLUXSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSUXSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSOXSEG" # nf # "e" #eew, [SMX60_VLS], mx, IsWorstCase>;
+ }
+ }
+}
+
+// Whole register move/load/store
+foreach LMul = [1, 2, 4, 8] in {
+ def : WriteRes<!cast<SchedWrite>("WriteVLD" # LMul # "R"), [SMX60_VLS]>;
+ def : WriteRes<!cast<SchedWrite>("WriteVST" # LMul # "R"), [SMX60_VLS]>;
+
+ def : WriteRes<!cast<SchedWrite>("WriteVMov" # LMul # "V"), [SMX60_VIEU]>;
+}
+
+// 11. Vector Integer Arithmetic Instructions
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ defm "" : LMULWriteResMX<"WriteVIALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVExtV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMinMaxV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMinMaxX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovI", [SMX60_VIEU], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVIMulV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulAddX", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
+// Widening
+foreach mx = SchedMxListW in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
+
+ defm "" : LMULWriteResMX<"WriteVIWALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulAddX", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
+// Vector Integer Division and Remainder
+foreach mx = SchedMxList in {
+ foreach sew = SchedSEWSet<mx>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ }
+}
+
+// Narrowing Shift and Clips
+foreach mx = SchedMxListW in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
+
+ defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipI", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
+// 12. Vector Fixed-Point Arithmetic Instructions
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ defm "" : LMULWriteResMX<"WriteVSALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVAALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVAALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSMulV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSMulX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
+// 13. Vector Floating-Point Instructions
+foreach mx = SchedMxListF in {
+ foreach sew = SchedSEWSet<mx, isF=1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListF, isF=1>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFALUV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFALUF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFMulV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFMulF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFMulAddV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFMulAddF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxListF in {
+ foreach sew = SchedSEWSet<mx, isF=1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListF, isF=1>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFRecpV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFSgnjV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFSgnjF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFMinMaxV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFMinMaxF", [SMX60_VFP], mx, sew, IsWorstCase>;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFCvtIToFV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ defm "" : LMULWriteResMX<"WriteVFCmpV", [SMX60_VFP], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVFCmpF", [SMX60_VFP], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVFClassV", [SMX60_VFP], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVFMergeV", [SMX60_VFP], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVFMovV", [SMX60_VFP], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVFCvtFToIV", [SMX60_VFP], mx, IsWorstCase>;
+}
+
+// Widening
+foreach mx = SchedMxListW in {
+ foreach sew = SchedSEWSet<mx, isF=0, isWidening=1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListW>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWCvtIToFV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxListFW in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListFW>.c;
+
+ defm "" : LMULWriteResMX<"WriteVFWCvtFToIV", [SMX60_VFP], mx, IsWorstCase>;
+}
+
+foreach mx = SchedMxListFW in {
+ foreach sew = SchedSEWSet<mx, isF=1, isWidening=1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListFW, isF=1>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWALUV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWALUF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWMulV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWMulF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWMulAddV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWMulAddF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWCvtFToFV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+// Narrowing
+foreach mx = SchedMxListW in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
+
+ defm "" : LMULWriteResMX<"WriteVFNCvtFToIV", [SMX60_VFP], mx, IsWorstCase>;
+}
+
+foreach mx = SchedMxListFW in {
+ foreach sew = SchedSEWSet<mx, isF=1, isWidening=1>.val in {
+
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListFW, isF=1>.c;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFNCvtIToFV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFNCvtFToFV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+// Vector Floating-Point Division and Square Root
+foreach mx = SchedMxListF in {
+ foreach sew = SchedSEWSet<mx, 1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListF, 1>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFDivV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFDivF", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFSqrtV", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+// 14. Vector Reduction Operations
+foreach mx = SchedMxList in {
+ foreach sew = SchedSEWSet<mx>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIRedV_From", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIRedMinMaxV_From", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxListWRed in {
+ foreach sew = SchedSEWSet<mx, 0, 1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListWRed>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIWRedV_From", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxListF in {
+ foreach sew = SchedSEWSet<mx, 1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListF, 1>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFRedV_From", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFRedOV_From", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFRedMinMaxV_From", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxListFWRed in {
+ foreach sew = SchedSEWSet<mx, 1, 1>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxListFWRed, 1>.c;
+
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWRedV_From", [SMX60_VFP], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVFWRedOV_From", [SMX60_VFP], mx, sew, IsWorstCase>;
+ }
+}
+
+// 15. Vector Mask Instructions
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ defm "" : LMULWriteResMX<"WriteVMALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVMPopV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVMFFSV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVMSFSV", [SMX60_VIEU], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVIotaV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIdxV", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
+// 16. Vector Permutation Instructions
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ defm "" : LMULWriteResMX<"WriteVSlideI", [SMX60_VIEU], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVISlide1X", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVFSlide1F", [SMX60_VFP], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVSlideUpX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSlideDownX", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
+def : WriteRes<WriteVMovXS, [SMX60_VIEU]>;
+def : WriteRes<WriteVMovSX, [SMX60_VIEU]>;
+
+def : WriteRes<WriteVMovFS, [SMX60_VIEU]>;
+def : WriteRes<WriteVMovSF, [SMX60_VIEU]>;
+
+// Gather and Compress
+foreach mx = SchedMxList in {
+ foreach sew = SchedSEWSet<mx>.val in {
+ defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVRGatherVV", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVRGatherEI16VV", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVCompressV", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxList in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
+
+ defm "" : LMULWriteResMX<"WriteVRGatherVX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVRGatherVI", [SMX60_VIEU], mx, IsWorstCase>;
+}
+
// Others
def : WriteRes<WriteCSR, [SMX60_IEU]>;
def : WriteRes<WriteNop, [SMX60_IEU]>;
+def : WriteRes<WriteRdVLENB, [SMX60_IEUA]>;
//===----------------------------------------------------------------------===//
// Bypass and advance
@@ -341,10 +697,184 @@ def : ReadAdvance<ReadCLMUL, 0>;
def : ReadAdvance<ReadSingleBit, 0>;
def : ReadAdvance<ReadSingleBitImm, 0>;
+// 6. Configuration-Setting Instructions
+def : ReadAdvance<ReadVSETVLI, 0>;
+def : ReadAdvance<ReadVSETVL, 0>;
+
+// 7. Vector Loads and Stores
+def : ReadAdvance<ReadVLDX, 0>;
+def : ReadAdvance<ReadVSTX, 0>;
+defm "" : LMULReadAdvance<"ReadVSTEV", 0>;
+defm "" : LMULReadAdvance<"ReadVSTM", 0>;
+def : ReadAdvance<ReadVLDSX, 0>;
+def : ReadAdvance<ReadVSTSX, 0>;
+defm "" : LMULReadAdvance<"ReadVSTS8V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTS16V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTS32V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTS64V", 0>;
+defm "" : LMULReadAdvance<"ReadVLDUXV", 0>;
+defm "" : LMULReadAdvance<"ReadVLDOXV", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX8", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX16", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX32", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX64", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUXV", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX8V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX16V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX32V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTUX64V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX8", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX16", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX32", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX64", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOXV", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX8V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX16V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX32V", 0>;
+defm "" : LMULReadAdvance<"ReadVSTOX64V", 0>;
+// LMUL Aware
+def : ReadAdvance<ReadVST1R, 0>;
+def : ReadAdvance<ReadVST2R, 0>;
+def : ReadAdvance<ReadVST4R, 0>;
+def : ReadAdvance<ReadVST8R, 0>;
+
+// 12. Vector Integer Arithmetic Instructions
+defm : LMULReadAdvance<"ReadVIALUV", 0>;
+defm : LMULReadAdvance<"ReadVIALUX", 0>;
+defm : LMULReadAdvanceW<"ReadVIWALUV", 0>;
+defm : LMULReadAdvanceW<"ReadVIWALUX", 0>;
+defm : LMULReadAdvance<"ReadVExtV", 0>;
+defm : LMULReadAdvance<"ReadVICALUV", 0>;
+defm : LMULReadAdvance<"ReadVICALUX", 0>;
+defm : LMULReadAdvance<"ReadVShiftV", 0>;
+defm : LMULReadAdvance<"ReadVShiftX", 0>;
+defm : LMULReadAdvanceW<"ReadVNShiftV", 0>;
+defm : LMULReadAdvanceW<"ReadVNShiftX", 0>;
+defm : LMULReadAdvance<"ReadVICmpV", 0>;
+defm : LMULReadAdvance<"ReadVICmpX", 0>;
+defm : LMULReadAdvance<"ReadVIMinMaxV", 0>;
+defm : LMULReadAdvance<"ReadVIMinMaxX", 0>;
+defm : LMULReadAdvance<"ReadVIMulV", 0>;
+defm : LMULReadAdvance<"ReadVIMulX", 0>;
+defm : LMULSEWReadAdvance<"ReadVIDivV", 0>;
+defm : LMULSEWReadAdvance<"ReadVIDivX", 0>;
+defm : LMULReadAdvanceW<"ReadVIWMulV", 0>;
+defm : LMULReadAdvanceW<"ReadVIWMulX", 0>;
+defm : LMULReadAdvance<"ReadVIMulAddV", 0>;
+defm : LMULReadAdvance<"ReadVIMulAddX", 0>;
+defm : LMULReadAdvanceW<"ReadVIWMulAddV", 0>;
+defm : LMULReadAdvanceW<"ReadVIWMulAddX", 0>;
+defm : LMULReadAdvance<"ReadVIMergeV", 0>;
+defm : LMULReadAdvance<"ReadVIMergeX", 0>;
+defm : LMULReadAdvance<"ReadVIMovV", 0>;
+defm : LMULReadAdvance<"ReadVIMovX", 0>;
+
+// 13. Vector Fixed-Point Arithmetic Instructions
+defm "" : LMULReadAdvance<"ReadVSALUV", 0>;
+defm "" : LMULReadAdvance<"ReadVSALUX", 0>;
+defm "" : LMULReadAdvance<"ReadVAALUV", 0>;
+defm "" : LMULReadAdvance<"ReadVAALUX", 0>;
+defm "" : LMULReadAdvance<"ReadVSMulV", 0>;
+defm "" : LMULReadAdvance<"ReadVSMulX", 0>;
+defm "" : LMULReadAdvance<"ReadVSShiftV", 0>;
+defm "" : LMULReadAdvance<"ReadVSShiftX", 0>;
+defm "" : LMULReadAdvanceW<"ReadVNClipV", 0>;
+defm "" : LMULReadAdvanceW<"ReadVNClipX", 0>;
+
+// 14. Vector Floating-Point Instructions
+defm "" : LMULSEWReadAdvanceF<"ReadVFALUV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFALUF", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWALUV", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWALUF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFMulV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFMulF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFDivV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFDivF", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWMulV", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWMulF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFMulAddV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFMulAddF", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWMulAddV", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWMulAddF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFSqrtV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFRecpV", 0>;
+defm "" : LMULReadAdvance<"ReadVFCmpV", 0>;
+defm "" : LMULReadAdvance<"ReadVFCmpF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFMinMaxV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFMinMaxF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFSgnjV", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFSgnjF", 0>;
+defm "" : LMULReadAdvance<"ReadVFClassV", 0>;
+defm "" : LMULReadAdvance<"ReadVFMergeV", 0>;
+defm "" : LMULReadAdvance<"ReadVFMergeF", 0>;
+defm "" : LMULReadAdvance<"ReadVFMovF", 0>;
+defm "" : LMULSEWReadAdvanceF<"ReadVFCvtIToFV", 0>;
+defm "" : LMULReadAdvance<"ReadVFCvtFToIV", 0>;
+defm "" : LMULSEWReadAdvanceW<"ReadVFWCvtIToFV", 0>;
+defm "" : LMULReadAdvanceFW<"ReadVFWCvtFToIV", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFWCvtFToFV", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFNCvtIToFV", 0>;
+defm "" : LMULReadAdvanceW<"ReadVFNCvtFToIV", 0>;
+defm "" : LMULSEWReadAdvanceFW<"ReadVFNCvtFToFV", 0>;
+
+// 15. Vector Reduction Operations
+def : ReadAdvance<ReadVIRedV, 0>;
+def : ReadAdvance<ReadVIRedV0, 0>;
+def : ReadAdvance<ReadVIWRedV, 0>;
+def : ReadAdvance<ReadVIWRedV0, 0>;
+def : ReadAdvance<ReadVFRedV, 0>;
+def : ReadAdvance<ReadVFRedV0, 0>;
+def : ReadAdvance<ReadVFRedOV, 0>;
+def : ReadAdvance<ReadVFRedOV0, 0>;
+def : ReadAdvance<ReadVFWRedV, 0>;
+def : ReadAdvance<ReadVFWRedV0, 0>;
+def : ReadAdvance<ReadVFWRedOV, 0>;
+def : ReadAdvance<ReadVFWRedOV0, 0>;
+
+// 16. Vector Mask Instructions
+defm "" : LMULReadAdvance<"ReadVMALUV", 0>;
+defm "" : LMULReadAdvance<"ReadVMPopV", 0>;
+defm "" : LMULReadAdvance<"ReadVMFFSV", 0>;
+defm "" : LMULReadAdvance<"ReadVMSFSV", 0>;
+defm "" : LMULReadAdvance<"ReadVIotaV", 0>;
+
+// 17. Vector Permutation Instructions
+def : ReadAdvance<ReadVMovXS, 0>;
+def : ReadAdvance<ReadVMovSX_V, 0>;
+def : ReadAdvance<ReadVMovSX_X, 0>;
+def : ReadAdvance<ReadVMovFS, 0>;
+def : ReadAdvance<ReadVMovSF_V, 0>;
+def : ReadAdvance<ReadVMovSF_F, 0>;
+defm "" : LMULReadAdvance<"ReadVISlideV", 0>;
+defm "" : LMULReadAdvance<"ReadVISlideX", 0>;
+defm "" : LMULReadAdvance<"ReadVFSlideV", 0>;
+defm "" : LMULReadAdvance<"ReadVFSlideF", 0>;
+defm "" : LMULSEWReadAdvance<"ReadVRGatherVV_data", 0>;
+defm "" : LMULSEWReadAdvance<"ReadVRGatherVV_index", 0>;
+defm "" : LMULSEWReadAdvance<"ReadVRGatherEI16VV_data", 0>;
+defm "" : LMULSEWReadAdvance<"ReadVRGatherEI16VV_index", 0>;
+defm "" : LMULReadAdvance<"ReadVRGatherVX_data", 0>;
+defm "" : LMULReadAdvance<"ReadVRGatherVX_index", 0>;
+defm "" : LMULReadAdvance<"ReadVRGatherVI_data", 0>;
+defm "" : LMULSEWReadAdvance<"ReadVCompressV", 0>;
+// LMUL Aware
+def : ReadAdvance<ReadVMov1V, 0>;
+def : ReadAdvance<ReadVMov2V, 0>;
+def : ReadAdvance<ReadVMov4V, 0>;
+def : ReadAdvance<ReadVMov8V, 0>;
+
+// Others
+def : ReadAdvance<ReadVMask, 0>;
+def : ReadAdvance<ReadVPassthru_WorstCase, 0>;
+foreach mx = SchedMxList in {
+ def : ReadAdvance<!cast<SchedRead>("ReadVPassthru_" # mx), 0>;
+ foreach sew = SchedSEWSet<mx>.val in
+ def : ReadAdvance<!cast<SchedRead>("ReadVPassthru_" # mx # "_E" # sew), 0>;
+}
+
//===----------------------------------------------------------------------===//
// Unsupported extensions
defm : UnsupportedSchedQ;
-defm : UnsupportedSchedV;
defm : UnsupportedSchedZabha;
defm : UnsupportedSchedZbkb;
defm : UnsupportedSchedZbkx;
diff --git a/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll b/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
index 261a1f8fd2c6c..7990dfc0880a5 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
@@ -304,27 +304,27 @@ define void @test1(ptr nocapture noundef writeonly %dst, i32 noundef signext %i_
; RV64X60-NEXT: li t1, 0
; RV64X60-NEXT: addi s1, a7, -1
; RV64X60-NEXT: zext.w s1, s1
-; RV64X60-NEXT: mul t2, a1, s1
-; RV64X60-NEXT: mul t3, a3, s1
-; RV64X60-NEXT: mul t4, a5, s1
+; RV64X60-NEXT: mul t3, a1, s1
+; RV64X60-NEXT: mul t4, a3, s1
+; RV64X60-NEXT: mul t5, a5, s1
; RV64X60-NEXT: add s0, a0, a6
-; RV64X60-NEXT: add s1, a2, a6
-; RV64X60-NEXT: add t5, a4, a6
-; RV64X60-NEXT: add s0, s0, t2
; RV64X60-NEXT: csrr t2, vlenb
-; RV64X60-NEXT: add t3, t3, s1
+; RV64X60-NEXT: add s1, a2, a6
+; RV64X60-NEXT: add t3, t3, s0
+; RV64X60-NEXT: add s0, a4, a6
+; RV64X60-NEXT: add t4, t4, s1
; RV64X60-NEXT: li t6, 32
-; RV64X60-NEXT: add t4, t4, t5
-; RV64X60-NEXT: sltu t3, a0, t3
-; RV64X60-NEXT: sltu s1, a2, s0
-; RV64X60-NEXT: and t3, t3, s1
-; RV64X60-NEXT: or t5, a1, a3
-; RV64X60-NEXT: sltu s1, a0, t4
-; RV64X60-NEXT: sltu s0, a4, s0
-; RV64X60-NEXT: slti t4, t5, 0
+; RV64X60-NEXT: add t5, t5, s0
+; RV64X60-NEXT: sltu s0, a0, t4
+; RV64X60-NEXT: sltu s1, a2, t3
+; RV64X60-NEXT: and t4, s0, s1
+; RV64X60-NEXT: or s2, a1, a3
+; RV64X60-NEXT: sltu s0, a0, t5
+; RV64X60-NEXT: sltu s1, a4, t3
+; RV64X60-NEXT: slti t3, s2, 0
; RV64X60-NEXT: and s0, s0, s1
; RV64X60-NEXT: or s1, a1, a5
-; RV64X60-NEXT: or t4, t3, t4
+; RV64X60-NEXT: or t4, t4, t3
; RV64X60-NEXT: slli t3, t2, 1
; RV64X60-NEXT: slti s1, s1, 0
; RV64X60-NEXT: or s0, s0, s1
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/atomic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/atomic.s
index bc9229471b20e..8838c862e6b75 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/atomic.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/atomic.s
@@ -107,6 +107,9 @@ amomaxu.d.aqrl s5, s4, (s3)
# CHECK-NEXT: [2] - SMX60_IEUA:1
# CHECK-NEXT: [3] - SMX60_IEUB:1
# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
@@ -215,98 +218,101 @@ amomaxu.d.aqrl s5, s4, (s3)
# CHECK-NEXT: [2] - SMX60_IEUB
# CHECK-NEXT: [3.0] - SMX60_LS
# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3.0] [3.1]
-# CHECK-NEXT: - - - 44.00 44.00
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - - - 44.00 44.00 - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] Instructions:
-# CHECK-NEXT: - - - 0.50 0.50 lr.w t0, (t1)
-# CHECK-NEXT: - - - 0.50 0.50 lr.w.aq t1, (t2)
-# CHECK-NEXT: - - - 0.50 0.50 lr.w.rl t2, (t3)
-# CHECK-NEXT: - - - 0.50 0.50 lr.w.aqrl t3, (t4)
-# CHECK-NEXT: - - - 0.50 0.50 sc.w t6, t5, (t4)
-# CHECK-NEXT: - - - 0.50 0.50 sc.w.aq t5, t4, (t3)
-# CHECK-NEXT: - - - 0.50 0.50 sc.w.rl t4, t3, (t2)
-# CHECK-NEXT: - - - 0.50 0.50 sc.w.aqrl t3, t2, (t1)
-# CHECK-NEXT: - - - 0.50 0.50 lr.d t0, (t1)
-# CHECK-NEXT: - - - 0.50 0.50 lr.d.aq t1, (t2)
-# CHECK-NEXT: - - - 0.50 0.50 lr.d.rl t2, (t3)
-# CHECK-NEXT: - - - 0.50 0.50 lr.d.aqrl t3, (t4)
-# CHECK-NEXT: - - - 0.50 0.50 sc.d t6, t5, (t4)
-# CHECK-NEXT: - - - 0.50 0.50 sc.d.aq t5, t4, (t3)
-# CHECK-NEXT: - - - 0.50 0.50 sc.d.rl t4, t3, (t2)
-# CHECK-NEXT: - - - 0.50 0.50 sc.d.aqrl t3, t2, (t1)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.w a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.w a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.w a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.w a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.w a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.w a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.w s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.w s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.w s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.w.aq a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.w.aq a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.w.aq a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.w.aq a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.w.aq a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.w.aq a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.w.aq s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.w.aq s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.w.aq s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.w.rl a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.w.rl a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.w.rl a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.w.rl a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.w.rl a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.w.rl a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.w.rl s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.w.rl s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.w.rl s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.w.aqrl a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.w.aqrl a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.w.aqrl a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.w.aqrl a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.w.aqrl a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.w.aqrl a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.w.aqrl s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.w.aqrl s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.w.aqrl s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.d a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.d a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.d a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.d a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.d a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.d a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.d s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.d s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.d s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.d.aq a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.d.aq a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.d.aq a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.d.aq a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.d.aq a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.d.aq a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.d.aq s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.d.aq s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.d.aq s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.d.rl a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.d.rl a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.d.rl a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.d.rl a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.d.rl a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.d.rl a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.d.rl s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.d.rl s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.d.rl s5, s4, (s3)
-# CHECK-NEXT: - - - 0.50 0.50 amoswap.d.aqrl a4, ra, (s0)
-# CHECK-NEXT: - - - 0.50 0.50 amoadd.d.aqrl a1, a2, (a3)
-# CHECK-NEXT: - - - 0.50 0.50 amoxor.d.aqrl a2, a3, (a4)
-# CHECK-NEXT: - - - 0.50 0.50 amoand.d.aqrl a3, a4, (a5)
-# CHECK-NEXT: - - - 0.50 0.50 amoor.d.aqrl a4, a5, (a6)
-# CHECK-NEXT: - - - 0.50 0.50 amomin.d.aqrl a5, a6, (a7)
-# CHECK-NEXT: - - - 0.50 0.50 amomax.d.aqrl s7, s6, (s5)
-# CHECK-NEXT: - - - 0.50 0.50 amominu.d.aqrl s6, s5, (s4)
-# CHECK-NEXT: - - - 0.50 0.50 amomaxu.d.aqrl s5, s4, (s3)
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.w t0, (t1)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.w.aq t1, (t2)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.w.rl t2, (t3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.w.aqrl t3, (t4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.w t6, t5, (t4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.w.aq t5, t4, (t3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.w.rl t4, t3, (t2)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.w.aqrl t3, t2, (t1)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.d t0, (t1)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.d.aq t1, (t2)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.d.rl t2, (t3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lr.d.aqrl t3, (t4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.d t6, t5, (t4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.d.aq t5, t4, (t3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.d.rl t4, t3, (t2)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sc.d.aqrl t3, t2, (t1)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.w a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.w a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.w a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.w a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.w a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.w a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.w s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.w s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.w s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.w.aq a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.w.aq a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.w.aq a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.w.aq a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.w.aq a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.w.aq a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.w.aq s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.w.aq s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.w.aq s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.w.rl a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.w.rl a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.w.rl a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.w.rl a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.w.rl a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.w.rl a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.w.rl s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.w.rl s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.w.rl s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.w.aqrl a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.w.aqrl a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.w.aqrl a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.w.aqrl a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.w.aqrl a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.w.aqrl a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.w.aqrl s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.w.aqrl s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.w.aqrl s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.d a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.d a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.d a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.d a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.d a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.d a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.d s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.d s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.d s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.d.aq a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.d.aq a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.d.aq a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.d.aq a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.d.aq a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.d.aq a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.d.aq s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.d.aq s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.d.aq s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.d.rl a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.d.rl a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.d.rl a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.d.rl a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.d.rl a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.d.rl a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.d.rl s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.d.rl s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.d.rl s5, s4, (s3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoswap.d.aqrl a4, ra, (s0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoadd.d.aqrl a1, a2, (a3)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoxor.d.aqrl a2, a3, (a4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoand.d.aqrl a3, a4, (a5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amoor.d.aqrl a4, a5, (a6)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomin.d.aqrl a5, a6, (a7)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomax.d.aqrl s7, s6, (s5)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amominu.d.aqrl s6, s5, (s4)
+# CHECK-NEXT: - - - 0.50 0.50 - - - amomaxu.d.aqrl s5, s4, (s3)
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/floating-point.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/floating-point.s
index b86fcbccbeabb..78f4e7f50c745 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/floating-point.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/floating-point.s
@@ -135,6 +135,9 @@ fclass.d a3, ft10
# CHECK-NEXT: [2] - SMX60_IEUA:1
# CHECK-NEXT: [3] - SMX60_IEUB:1
# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
@@ -240,95 +243,98 @@ fclass.d a3, ft10
# CHECK-NEXT: [2] - SMX60_IEUB
# CHECK-NEXT: [3.0] - SMX60_LS
# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3.0] [3.1]
-# CHECK-NEXT: 149.00 11.00 11.00 3.00 3.00
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: 149.00 11.00 11.00 3.00 3.00 - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] Instructions:
-# CHECK-NEXT: - - - 0.50 0.50 flh ft0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 fsh ft0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 flw ft0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 fsw ft0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 fld ft0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 fsd ft0, 0(a0)
-# CHECK-NEXT: 1.00 - - - - fadd.h fs10, fs11, ft8
-# CHECK-NEXT: 1.00 - - - - fsub.h ft9, ft10, ft11
-# CHECK-NEXT: 1.00 - - - - fmul.h ft0, ft1, ft2
-# CHECK-NEXT: 12.00 - - - - fdiv.h ft3, ft4, ft5
-# CHECK-NEXT: 12.00 - - - - fsqrt.h ft6, ft7
-# CHECK-NEXT: 1.00 - - - - fmin.h fa5, fa6, fa7
-# CHECK-NEXT: 1.00 - - - - fmax.h fs2, fs3, fs4
-# CHECK-NEXT: 1.00 - - - - fmadd.h fa0, fa1, fa2, ft11
-# CHECK-NEXT: 1.00 - - - - fmsub.h fa4, fa5, fa6, fa7
-# CHECK-NEXT: 1.00 - - - - fnmsub.h fs2, fs3, fs4, fs5
-# CHECK-NEXT: 1.00 - - - - fnmadd.h fs6, fs7, fs8, fs9
-# CHECK-NEXT: 1.00 - - - - fadd.s fs10, fs11, ft8
-# CHECK-NEXT: 1.00 - - - - fsub.s ft9, ft10, ft11
-# CHECK-NEXT: 1.00 - - - - fmul.s ft0, ft1, ft2
-# CHECK-NEXT: 15.00 - - - - fdiv.s ft3, ft4, ft5
-# CHECK-NEXT: 15.00 - - - - fsqrt.s ft6, ft7
-# CHECK-NEXT: 1.00 - - - - fmin.s fa5, fa6, fa7
-# CHECK-NEXT: 1.00 - - - - fmax.s fs2, fs3, fs4
-# CHECK-NEXT: 1.00 - - - - fmadd.s fa0, fa1, fa2, ft11
-# CHECK-NEXT: 1.00 - - - - fmsub.s fa4, fa5, fa6, fa7
-# CHECK-NEXT: 1.00 - - - - fnmsub.s fs2, fs3, fs4, fs5
-# CHECK-NEXT: 1.00 - - - - fnmadd.s fs6, fs7, fs8, fs9
-# CHECK-NEXT: 1.00 - - - - fadd.d fs10, fs11, ft8
-# CHECK-NEXT: 1.00 - - - - fsub.d ft9, ft10, ft11
-# CHECK-NEXT: 1.00 - - - - fmul.d ft0, ft1, ft2
-# CHECK-NEXT: 22.00 - - - - fdiv.d ft3, ft4, ft5
-# CHECK-NEXT: 22.00 - - - - fsqrt.d ft6, ft7
-# CHECK-NEXT: 1.00 - - - - fmin.d fa5, fa6, fa7
-# CHECK-NEXT: 1.00 - - - - fmax.d fs2, fs3, fs4
-# CHECK-NEXT: 1.00 - - - - fmadd.d fa0, fa1, fa2, ft11
-# CHECK-NEXT: 1.00 - - - - fmsub.d fa4, fa5, fa6, fa7
-# CHECK-NEXT: 1.00 - - - - fnmsub.d fs2, fs3, fs4, fs5
-# CHECK-NEXT: 1.00 - - - - fnmadd.d fs6, fs7, fs8, fs9
-# CHECK-NEXT: - 0.50 0.50 - - fmv.x.h a2, fs7
-# CHECK-NEXT: - 0.50 0.50 - - fmv.h.x ft1, a6
-# CHECK-NEXT: 1.00 - - - - fcvt.s.h fa0, ft0
-# CHECK-NEXT: 1.00 - - - - fcvt.s.h fa0, ft0, rup
-# CHECK-NEXT: 1.00 - - - - fcvt.h.s ft2, fa2
-# CHECK-NEXT: 1.00 - - - - fcvt.d.h fa0, ft0
-# CHECK-NEXT: 1.00 - - - - fcvt.d.h fa0, ft0, rup
-# CHECK-NEXT: 1.00 - - - - fcvt.h.d ft2, fa2
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.w.s a0, fs5
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.wu.s a1, fs6
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.s.w ft11, a4
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.s.wu ft0, a5
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.l.s a0, ft0
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.lu.s a1, ft1
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.s.l ft2, a2
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.s.lu ft3, a3
-# CHECK-NEXT: - 0.50 0.50 - - fmv.x.w a2, fs7
-# CHECK-NEXT: - 0.50 0.50 - - fmv.w.x ft1, a6
-# CHECK-NEXT: 1.00 - - - - fsgnj.s fs1, fa0, fa1
-# CHECK-NEXT: 1.00 - - - - fsgnjn.s fa1, fa3, fa4
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.wu.d a4, ft11
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.w.d a4, ft11
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.d.w ft0, a5
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.d.wu ft1, a6
-# CHECK-NEXT: 1.00 - - - - fcvt.s.d fs5, fs6
-# CHECK-NEXT: 1.00 - - - - fcvt.d.s fs7, fs8
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.l.d a0, ft0
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.lu.d a1, ft1
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.d.l ft3, a3
-# CHECK-NEXT: - 0.50 0.50 - - fcvt.d.lu ft4, a4
-# CHECK-NEXT: - 0.50 0.50 - - fmv.x.d a2, ft2
-# CHECK-NEXT: - 0.50 0.50 - - fmv.d.x ft5, a5
-# CHECK-NEXT: 1.00 - - - - fsgnj.d fs1, fa0, fa1
-# CHECK-NEXT: 1.00 - - - - fsgnjn.d fa1, fa3, fa4
-# CHECK-NEXT: 1.00 - - - - feq.h a1, fs8, fs9
-# CHECK-NEXT: 1.00 - - - - flt.h a2, fs10, fs11
-# CHECK-NEXT: 1.00 - - - - fle.h a3, ft8, ft9
-# CHECK-NEXT: 1.00 - - - - feq.s a1, fs8, fs9
-# CHECK-NEXT: 1.00 - - - - flt.s a2, fs10, fs11
-# CHECK-NEXT: 1.00 - - - - fle.s a3, ft8, ft9
-# CHECK-NEXT: 1.00 - - - - feq.d a1, fs8, fs9
-# CHECK-NEXT: 1.00 - - - - flt.d a2, fs10, fs11
-# CHECK-NEXT: 1.00 - - - - fle.d a3, ft8, ft9
-# CHECK-NEXT: 1.00 - - - - fclass.s a3, ft10
-# CHECK-NEXT: 1.00 - - - - fclass.s a3, ft10
-# CHECK-NEXT: 1.00 - - - - fclass.d a3, ft10
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - - - 0.50 0.50 - - - flh ft0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - fsh ft0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - flw ft0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - fsw ft0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - fld ft0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - fsd ft0, 0(a0)
+# CHECK-NEXT: 1.00 - - - - - - - fadd.h fs10, fs11, ft8
+# CHECK-NEXT: 1.00 - - - - - - - fsub.h ft9, ft10, ft11
+# CHECK-NEXT: 1.00 - - - - - - - fmul.h ft0, ft1, ft2
+# CHECK-NEXT: 12.00 - - - - - - - fdiv.h ft3, ft4, ft5
+# CHECK-NEXT: 12.00 - - - - - - - fsqrt.h ft6, ft7
+# CHECK-NEXT: 1.00 - - - - - - - fmin.h fa5, fa6, fa7
+# CHECK-NEXT: 1.00 - - - - - - - fmax.h fs2, fs3, fs4
+# CHECK-NEXT: 1.00 - - - - - - - fmadd.h fa0, fa1, fa2, ft11
+# CHECK-NEXT: 1.00 - - - - - - - fmsub.h fa4, fa5, fa6, fa7
+# CHECK-NEXT: 1.00 - - - - - - - fnmsub.h fs2, fs3, fs4, fs5
+# CHECK-NEXT: 1.00 - - - - - - - fnmadd.h fs6, fs7, fs8, fs9
+# CHECK-NEXT: 1.00 - - - - - - - fadd.s fs10, fs11, ft8
+# CHECK-NEXT: 1.00 - - - - - - - fsub.s ft9, ft10, ft11
+# CHECK-NEXT: 1.00 - - - - - - - fmul.s ft0, ft1, ft2
+# CHECK-NEXT: 15.00 - - - - - - - fdiv.s ft3, ft4, ft5
+# CHECK-NEXT: 15.00 - - - - - - - fsqrt.s ft6, ft7
+# CHECK-NEXT: 1.00 - - - - - - - fmin.s fa5, fa6, fa7
+# CHECK-NEXT: 1.00 - - - - - - - fmax.s fs2, fs3, fs4
+# CHECK-NEXT: 1.00 - - - - - - - fmadd.s fa0, fa1, fa2, ft11
+# CHECK-NEXT: 1.00 - - - - - - - fmsub.s fa4, fa5, fa6, fa7
+# CHECK-NEXT: 1.00 - - - - - - - fnmsub.s fs2, fs3, fs4, fs5
+# CHECK-NEXT: 1.00 - - - - - - - fnmadd.s fs6, fs7, fs8, fs9
+# CHECK-NEXT: 1.00 - - - - - - - fadd.d fs10, fs11, ft8
+# CHECK-NEXT: 1.00 - - - - - - - fsub.d ft9, ft10, ft11
+# CHECK-NEXT: 1.00 - - - - - - - fmul.d ft0, ft1, ft2
+# CHECK-NEXT: 22.00 - - - - - - - fdiv.d ft3, ft4, ft5
+# CHECK-NEXT: 22.00 - - - - - - - fsqrt.d ft6, ft7
+# CHECK-NEXT: 1.00 - - - - - - - fmin.d fa5, fa6, fa7
+# CHECK-NEXT: 1.00 - - - - - - - fmax.d fs2, fs3, fs4
+# CHECK-NEXT: 1.00 - - - - - - - fmadd.d fa0, fa1, fa2, ft11
+# CHECK-NEXT: 1.00 - - - - - - - fmsub.d fa4, fa5, fa6, fa7
+# CHECK-NEXT: 1.00 - - - - - - - fnmsub.d fs2, fs3, fs4, fs5
+# CHECK-NEXT: 1.00 - - - - - - - fnmadd.d fs6, fs7, fs8, fs9
+# CHECK-NEXT: - 0.50 0.50 - - - - - fmv.x.h a2, fs7
+# CHECK-NEXT: - 0.50 0.50 - - - - - fmv.h.x ft1, a6
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.s.h fa0, ft0
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.s.h fa0, ft0, rup
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.h.s ft2, fa2
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.d.h fa0, ft0
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.d.h fa0, ft0, rup
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.h.d ft2, fa2
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.w.s a0, fs5
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.wu.s a1, fs6
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.s.w ft11, a4
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.s.wu ft0, a5
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.l.s a0, ft0
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.lu.s a1, ft1
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.s.l ft2, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.s.lu ft3, a3
+# CHECK-NEXT: - 0.50 0.50 - - - - - fmv.x.w a2, fs7
+# CHECK-NEXT: - 0.50 0.50 - - - - - fmv.w.x ft1, a6
+# CHECK-NEXT: 1.00 - - - - - - - fsgnj.s fs1, fa0, fa1
+# CHECK-NEXT: 1.00 - - - - - - - fsgnjn.s fa1, fa3, fa4
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.wu.d a4, ft11
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.w.d a4, ft11
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.d.w ft0, a5
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.d.wu ft1, a6
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.s.d fs5, fs6
+# CHECK-NEXT: 1.00 - - - - - - - fcvt.d.s fs7, fs8
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.l.d a0, ft0
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.lu.d a1, ft1
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.d.l ft3, a3
+# CHECK-NEXT: - 0.50 0.50 - - - - - fcvt.d.lu ft4, a4
+# CHECK-NEXT: - 0.50 0.50 - - - - - fmv.x.d a2, ft2
+# CHECK-NEXT: - 0.50 0.50 - - - - - fmv.d.x ft5, a5
+# CHECK-NEXT: 1.00 - - - - - - - fsgnj.d fs1, fa0, fa1
+# CHECK-NEXT: 1.00 - - - - - - - fsgnjn.d fa1, fa3, fa4
+# CHECK-NEXT: 1.00 - - - - - - - feq.h a1, fs8, fs9
+# CHECK-NEXT: 1.00 - - - - - - - flt.h a2, fs10, fs11
+# CHECK-NEXT: 1.00 - - - - - - - fle.h a3, ft8, ft9
+# CHECK-NEXT: 1.00 - - - - - - - feq.s a1, fs8, fs9
+# CHECK-NEXT: 1.00 - - - - - - - flt.s a2, fs10, fs11
+# CHECK-NEXT: 1.00 - - - - - - - fle.s a3, ft8, ft9
+# CHECK-NEXT: 1.00 - - - - - - - feq.d a1, fs8, fs9
+# CHECK-NEXT: 1.00 - - - - - - - flt.d a2, fs10, fs11
+# CHECK-NEXT: 1.00 - - - - - - - fle.d a3, ft8, ft9
+# CHECK-NEXT: 1.00 - - - - - - - fclass.s a3, ft10
+# CHECK-NEXT: 1.00 - - - - - - - fclass.s a3, ft10
+# CHECK-NEXT: 1.00 - - - - - - - fclass.d a3, ft10
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/integer.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/integer.s
index b72540f29f487..51a036aaae784 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/integer.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/integer.s
@@ -170,6 +170,9 @@ bseti a0, a1, 1
# CHECK-NEXT: [2] - SMX60_IEUA:1
# CHECK-NEXT: [3] - SMX60_IEUB:1
# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
@@ -306,126 +309,129 @@ bseti a0, a1, 1
# CHECK-NEXT: [2] - SMX60_IEUB
# CHECK-NEXT: [3.0] - SMX60_LS
# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3.0] [3.1]
-# CHECK-NEXT: - 180.50 44.50 5.50 5.50
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 180.50 44.50 5.50 5.50 - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] Instructions:
-# CHECK-NEXT: - 0.50 0.50 - - addi a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - addiw a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - slti a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - seqz a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - andi a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - ori a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - xori a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - slli a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - srli a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - srai a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - slliw a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - srliw a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - sraiw a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - lui a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - auipc a1, 1
-# CHECK-NEXT: - 0.50 0.50 - - add a0, a0, a1
-# CHECK-NEXT: - 0.50 0.50 - - addw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - slt a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sltu a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - and a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - or a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - xor a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sll a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - srl a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sra a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sllw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - srlw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sraw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sub a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - subw a0, a0, a0
-# CHECK-NEXT: - 1.00 - - - jal a0, .Ltmp0
-# CHECK-NEXT: - 1.00 - - - jalr a0
-# CHECK-NEXT: - 1.00 - - - beq a0, a0, .Ltmp1
-# CHECK-NEXT: - 1.00 - - - bne a0, a0, .Ltmp2
-# CHECK-NEXT: - 1.00 - - - blt a0, a0, .Ltmp3
-# CHECK-NEXT: - 1.00 - - - bltu a0, a0, .Ltmp4
-# CHECK-NEXT: - 1.00 - - - bge a0, a0, .Ltmp5
-# CHECK-NEXT: - 1.00 - - - bgeu a0, a0, .Ltmp6
-# CHECK-NEXT: - 0.50 0.50 - - add a0, a0, a0
-# CHECK-NEXT: - - - 0.50 0.50 lb t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 lbu t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 lh t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 lhu t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 lw t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 lwu t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 ld t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 sb t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 sh t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 sw t0, 0(a0)
-# CHECK-NEXT: - - - 0.50 0.50 sd t0, 0(a0)
-# CHECK-NEXT: - 0.50 0.50 - - mul a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - mulh a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - mulhu a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - mulhsu a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - mulw a0, a0, a0
-# CHECK-NEXT: - 20.00 - - - div a0, a1, a2
-# CHECK-NEXT: - 20.00 - - - divu a0, a1, a2
-# CHECK-NEXT: - 20.00 - - - rem a0, a1, a2
-# CHECK-NEXT: - 20.00 - - - remu a0, a1, a2
-# CHECK-NEXT: - 12.00 - - - divw a0, a1, a2
-# CHECK-NEXT: - 12.00 - - - divuw a0, a1, a2
-# CHECK-NEXT: - 12.00 - - - remw a0, a1, a2
-# CHECK-NEXT: - 12.00 - - - remuw a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - csrrw t0, 4095, t1
-# CHECK-NEXT: - 0.50 0.50 - - csrrs s3, fflags, s5
-# CHECK-NEXT: - 0.50 0.50 - - csrrc sp, 0, ra
-# CHECK-NEXT: - 0.50 0.50 - - csrrwi a5, 0, 0
-# CHECK-NEXT: - 0.50 0.50 - - csrrsi t2, 4095, 31
-# CHECK-NEXT: - 0.50 0.50 - - csrrci t1, sscratch, 5
-# CHECK-NEXT: - 0.50 0.50 - - czero.eqz a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - czero.nez a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - czero.eqz a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - czero.nez a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - add.uw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - slli.uw a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - sh1add.uw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sh2add.uw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sh3add.uw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sh1add a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sh2add a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sh3add a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - andn a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - orn a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - xnor a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - clz a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - clzw a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - ctz a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - ctzw a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - cpop a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - cpopw a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - min a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - minu a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - max a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - maxu a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sext.b a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - sext.h a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - zext.h a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - rol a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - rolw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - ror a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - rorw a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - rori a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - roriw a0, a0, 1
-# CHECK-NEXT: - 0.50 0.50 - - orc.b a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - rev8 a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - clmul a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - clmulr a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - clmulh a0, a0, a0
-# CHECK-NEXT: - 0.50 0.50 - - bclr a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - bclri a0, a1, 1
-# CHECK-NEXT: - 0.50 0.50 - - bext a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - bexti a0, a1, 1
-# CHECK-NEXT: - 0.50 0.50 - - binv a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - binvi a0, a1, 1
-# CHECK-NEXT: - 0.50 0.50 - - bset a0, a1, a2
-# CHECK-NEXT: - 0.50 0.50 - - bseti a0, a1, 1
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 0.50 0.50 - - - - - addi a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - addiw a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - slti a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - seqz a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - andi a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - ori a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - xori a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - slli a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - srli a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - srai a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - slliw a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - srliw a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - sraiw a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - lui a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - auipc a1, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - add a0, a0, a1
+# CHECK-NEXT: - 0.50 0.50 - - - - - addw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - slt a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sltu a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - and a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - or a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - xor a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sll a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - srl a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sra a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sllw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - srlw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sraw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sub a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - subw a0, a0, a0
+# CHECK-NEXT: - 1.00 - - - - - - jal a0, .Ltmp0
+# CHECK-NEXT: - 1.00 - - - - - - jalr a0
+# CHECK-NEXT: - 1.00 - - - - - - beq a0, a0, .Ltmp1
+# CHECK-NEXT: - 1.00 - - - - - - bne a0, a0, .Ltmp2
+# CHECK-NEXT: - 1.00 - - - - - - blt a0, a0, .Ltmp3
+# CHECK-NEXT: - 1.00 - - - - - - bltu a0, a0, .Ltmp4
+# CHECK-NEXT: - 1.00 - - - - - - bge a0, a0, .Ltmp5
+# CHECK-NEXT: - 1.00 - - - - - - bgeu a0, a0, .Ltmp6
+# CHECK-NEXT: - 0.50 0.50 - - - - - add a0, a0, a0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lb t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lbu t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lh t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lhu t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lw t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - lwu t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - ld t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sb t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sh t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sw t0, 0(a0)
+# CHECK-NEXT: - - - 0.50 0.50 - - - sd t0, 0(a0)
+# CHECK-NEXT: - 0.50 0.50 - - - - - mul a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - mulh a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - mulhu a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - mulhsu a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - mulw a0, a0, a0
+# CHECK-NEXT: - 20.00 - - - - - - div a0, a1, a2
+# CHECK-NEXT: - 20.00 - - - - - - divu a0, a1, a2
+# CHECK-NEXT: - 20.00 - - - - - - rem a0, a1, a2
+# CHECK-NEXT: - 20.00 - - - - - - remu a0, a1, a2
+# CHECK-NEXT: - 12.00 - - - - - - divw a0, a1, a2
+# CHECK-NEXT: - 12.00 - - - - - - divuw a0, a1, a2
+# CHECK-NEXT: - 12.00 - - - - - - remw a0, a1, a2
+# CHECK-NEXT: - 12.00 - - - - - - remuw a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - csrrw t0, 4095, t1
+# CHECK-NEXT: - 0.50 0.50 - - - - - csrrs s3, fflags, s5
+# CHECK-NEXT: - 0.50 0.50 - - - - - csrrc sp, 0, ra
+# CHECK-NEXT: - 0.50 0.50 - - - - - csrrwi a5, 0, 0
+# CHECK-NEXT: - 0.50 0.50 - - - - - csrrsi t2, 4095, 31
+# CHECK-NEXT: - 0.50 0.50 - - - - - csrrci t1, sscratch, 5
+# CHECK-NEXT: - 0.50 0.50 - - - - - czero.eqz a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - czero.nez a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - czero.eqz a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - czero.nez a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - add.uw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - slli.uw a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - sh1add.uw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sh2add.uw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sh3add.uw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sh1add a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sh2add a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sh3add a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - andn a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - orn a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - xnor a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - clz a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - clzw a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - ctz a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - ctzw a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - cpop a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - cpopw a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - min a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - minu a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - max a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - maxu a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sext.b a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - sext.h a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - zext.h a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - rol a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - rolw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - ror a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - rorw a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - rori a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - roriw a0, a0, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - orc.b a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - rev8 a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - clmul a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - clmulr a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - clmulh a0, a0, a0
+# CHECK-NEXT: - 0.50 0.50 - - - - - bclr a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - bclri a0, a1, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - bext a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - bexti a0, a1, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - binv a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - binvi a0, a1, 1
+# CHECK-NEXT: - 0.50 0.50 - - - - - bset a0, a1, a2
+# CHECK-NEXT: - 0.50 0.50 - - - - - bseti a0, a1, 1
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
new file mode 100644
index 0000000000000..c7755dcc37658
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
@@ -0,0 +1,6820 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Basic arithmetic operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vadd.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vadd.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vadd.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vadd.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vadd.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vsub.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vsub.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vsub.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vadc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vadc.vvm v8, v8, v8, v0
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vadc.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vadc.vxm v8, v8, x30, v0
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vadc.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vadc.vim v8, v8, 12, v0
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vsbc.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vsbc.vvm v8, v8, v8, v0
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+vwaddu.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwaddu.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwaddu.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwaddu.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwaddu.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwaddu.wx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwadd.wv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwadd.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwadd.wx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwsubu.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwsubu.wv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwsubu.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwsubu.wx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwsub.wv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwsub.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwsub.wx v8, v16, x30
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 1120.00 - - - - 1120.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
new file mode 100644
index 0000000000000..0b5dd607c7196
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
@@ -0,0 +1,4328 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Bitwise and logical operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vand.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vand.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vand.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vand.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vand.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vand.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vor.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vor.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vor.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vor.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vor.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vor.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vxor.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vxor.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vxor.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vxor.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vxor.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vxor.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vnsra.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vnsra.wv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vnsra.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vnsra.wx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vnsra.wi v8, v16, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vnsra.wi v8, v16, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vnsrl.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vnsrl.wv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vnsrl.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vnsrl.wx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vnsrl.wi v8, v16, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vnsrl.wi v8, v16, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vnclipu.wi v8, v16, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vnclipu.wi v8, v16, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vnclipu.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vnclipu.wv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vnclipu.wx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vnclipu.wx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnclip.wi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vnclip.wi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vnclip.wi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vnclip.wi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
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+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vsrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vsrl.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vssra.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vssra.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vssra.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vssra.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vssra.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vssra.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vssrl.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vssrl.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vssrl.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vssrl.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vssrl.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vssrl.vx v8, v8, x30
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 708.00 - - - - 708.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
new file mode 100644
index 0000000000000..e381b45642628
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
@@ -0,0 +1,2704 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Comparison operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmseq.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmseq.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmseq.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmseq.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vmseq.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vmseq.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmsle.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmsle.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmsle.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmsle.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vmsle.vi v8, v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vmsle.vi v8, v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsleu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsleu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsleu.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
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+vsetvli x28, x0, e32, m8, tu, mu
+vmsgt.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmsgt.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmsgt.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmsgt.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmsgt.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmsltu.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmsltu.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmsltu.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmsltu.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmslt.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmslt.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmslt.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmslt.vx v8, v8, x30
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 440.00 - - - - 440.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
new file mode 100644
index 0000000000000..ca6e9d15332af
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
@@ -0,0 +1,1757 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Conversion operations
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e16, m8, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vsext.vf2 v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vsext.vf2 v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e16, m8, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vzext.vf2 v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vzext.vf2 v8, v16
+
+vsetvli x28, x0, e32, mf2, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vsext.vf4 v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vsext.vf4 v8, v16
+
+vsetvli x28, x0, e32, mf2, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vzext.vf4 v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vzext.vf4 v8, v16
+
+vsetvli x28, x0, e64, m1, tu, mu
+vsext.vf8 v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vsext.vf8 v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vsext.vf8 v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vsext.vf8 v8, v16
+
+vsetvli x28, x0, e64, m1, tu, mu
+vzext.vf8 v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vzext.vf8 v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vzext.vf8 v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vzext.vf8 v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfcvt.f.xu.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfcvt.f.xu.v v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfcvt.f.x.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfcvt.f.x.v v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfcvt.rtz.x.f.v v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfcvt.rtz.xu.f.v v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfcvt.x.f.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfcvt.x.f.v v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfcvt.xu.f.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfcvt.xu.f.v v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.f.f.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.f.f.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.f.xu.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.f.xu.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.f.x.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.f.x.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.rod.f.f.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.rod.f.f.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.rtz.x.f.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.rtz.xu.f.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.x.f.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.x.f.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfncvt.xu.f.w v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfncvt.xu.f.w v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.f.f.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.f.f.v v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.f.x.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.f.x.v v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.f.xu.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.f.xu.v v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.rtz.x.f.v v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.rtz.xu.f.v v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.x.f.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.x.f.v v8, v16
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vfwcvt.xu.f.v v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vfwcvt.xu.f.v v8, v16
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_X_V vfcvt.f.x.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_X_F_V vfcvt.x.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_F_W vfncvt.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_F_X_W vfncvt.f.x.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_X_F_W vfncvt.x.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 281.00 - - - 225.00 56.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
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+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.xu.v v8, v8
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.x.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.x.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.x.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.rtz.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.x.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfcvt.xu.f.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.xu.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.f.x.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rod.f.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.rtz.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.x.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfncvt.xu.f.w v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.x.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.f.xu.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.rtz.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.x.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwcvt.xu.f.v v8, v16
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
new file mode 100644
index 0000000000000..a3105c39ff978
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
@@ -0,0 +1,2185 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Fused multiply-add operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmacc.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmacc.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmacc.vx v8, x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmacc.vx v8, x8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmadd.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmadd.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmadd.vx v8, x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmadd.vx v8, x8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vnmsac.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vnmsac.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vnmsac.vx v8, x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vnmsac.vx v8, x8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vnmsub.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vnmsub.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vnmsub.vx v8, x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vnmsub.vx v8, x8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmaccu.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmaccu.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmaccu.vx v8, x16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmaccu.vx v8, x16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmacc.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmacc.vx v8, x16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmacc.vx v8, x16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmaccsu.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmaccsu.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmaccsu.vx v8, x16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmaccsu.vx v8, x16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmaccus.vx v8, x16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmaccus.vx v8, x16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwmacc.vf v8, f16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwmacc.vv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwmsac.vf v8, f16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwmsac.vv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwnmacc.vf v8, f16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwnmacc.vf v8, f16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwnmacc.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwnmacc.vv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwnmsac.vf v8, f16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwnmsac.vf v8, f16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwnmsac.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwnmsac.vv v8, v16, v24
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VV vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VF vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMSAC_VV vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VF vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMACC_VV vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VF vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWNMSAC_VV vfwnmsac.vv v8, v16, v24
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 353.00 - - - 72.00 281.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmacc.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vf v8, fa6, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwnmsac.vv v8, v16, v24
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s
new file mode 100644
index 0000000000000..f59c7987b615b
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s
@@ -0,0 +1,5599 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Floating point operations
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vmfeq.vf v8, v8, ft0
+vsetvli x28, x0, e16, mf4, tu, mu
+vmfeq.vf v8, v8, ft0
+vsetvli x28, x0, e16, m1, tu, mu
+vmfeq.vf v8, v8, ft0
+vsetvli x28, x0, e16, m2, tu, mu
+vmfeq.vf v8, v8, ft0
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+
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+
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+vfnmacc.vv v8, v8, v8
+
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+
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+vfnmsub.vf v8, f8, v8
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+
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+vsetvli x28, x0, e16, m4, tu, mu
+vfwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwadd.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwadd.wv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e16, m1, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e16, m2, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e16, m4, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e32, m1, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e32, m2, tu, mu
+vfwmul.vf v8, v16, ft0
+vsetvli x28, x0, e32, m4, tu, mu
+vfwmul.vf v8, v16, ft0
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwmul.vv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e16, m1, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e16, m2, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e16, m4, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e32, m1, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e32, m2, tu, mu
+vfwsub.vf v8, v16, ft0
+vsetvli x28, x0, e32, m4, tu, mu
+vfwsub.vf v8, v16, ft0
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwsub.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwsub.vv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e16, m1, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e16, m2, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e16, m4, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e32, m1, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e32, m2, tu, mu
+vfwsub.wf v8, v16, ft0
+vsetvli x28, x0, e32, m4, tu, mu
+vfwsub.wf v8, v16, ft0
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vfwsub.wv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vfwsub.wv v8, v16, v24
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VF vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFEQ_VV vmfeq.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGE_VF vmfge.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFGT_VF vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VF vmfle.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLE_VV vmfle.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VF vmflt.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFLT_VV vmflt.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VF vmfne.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VMFNE_VV vmfne.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VV vfadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFADD_VF vfadd.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VV vfsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSUB_VF vfsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCLASS_V vfclass.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VV vfdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFDIV_VF vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VV vfmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMAX_VF vfmax.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VV vfmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMIN_VF vfmin.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VV vfmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSAC_VF vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VV vfmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMSUB_VF vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VV vfmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMUL_VF vfmul.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VF vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMACC_VV vfmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VF vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMADD_VV vfmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_F_S vfmv.f.s fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFMV_S_F vfmv.s.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMV_V_F vfmv.v.f v8, fs0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VF vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMACC_VV vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VF vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMADD_VV vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VF vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSAC_VV vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VF vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFNMSUB_VV vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRDIV_VF vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREC7_V vfrec7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSQRT7_V vfrsqrt7.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFRSUB_VF vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSQRT_V vfsqrt.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJN_VV vfneg.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VF vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJ_VV vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSGNJX_VV vfabs.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VF vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_VV vfwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WF vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWADD_WV vfwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VF vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VF vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_VV vfwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WF vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWSUB_WV vfwsub.wv v8, v16, v24
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 915.00 - - - 885.00 30.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfeq.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfge.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfgt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfle.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmflt.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vmfne.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfadd.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfclass.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmax.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmin.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmul.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.f.s fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfmv.s.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmv.v.f v8, fs0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmacc.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrdiv.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrec7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsqrt7.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsqrt.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjn.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfneg.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnj.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfsgnjx.vf v8, v8, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfabs.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwadd.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwsub.wv v8, v16, v24
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mask.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mask.s
new file mode 100644
index 0000000000000..ce1ade0f143af
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mask.s
@@ -0,0 +1,1864 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Mask operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmand.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmand.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmnand.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmnand.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmandn.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmandn.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmxor.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmxor.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmor.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmor.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmnor.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmorn.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmorn.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmxnor.mm v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmxnor.mm v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e8, m1, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e8, m2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e8, m4, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e8, m8, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e16, m8, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vmsbf.m v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vmsbf.m v8, v16
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e8, m1, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e8, m2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e8, m4, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e8, m8, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e16, m8, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vmsif.m v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vmsif.m v8, v16
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e8, mf4, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e8, mf8, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e8, m1, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e8, m2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e8, m4, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e8, m8, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e16, mf2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e16, m8, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+vmsof.m v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+vmsof.m v8, v16
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vid.v v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vid.v v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vid.v v8
+vsetvli x28, x0, e8, m1, tu, mu
+vid.v v8
+vsetvli x28, x0, e8, m2, tu, mu
+vid.v v8
+vsetvli x28, x0, e8, m4, tu, mu
+vid.v v8
+vsetvli x28, x0, e8, m8, tu, mu
+vid.v v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vid.v v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vid.v v8
+vsetvli x28, x0, e16, m1, tu, mu
+vid.v v8
+vsetvli x28, x0, e16, m2, tu, mu
+vid.v v8
+vsetvli x28, x0, e16, m4, tu, mu
+vid.v v8
+vsetvli x28, x0, e16, m8, tu, mu
+vid.v v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vid.v v8
+vsetvli x28, x0, e32, m1, tu, mu
+vid.v v8
+vsetvli x28, x0, e32, m2, tu, mu
+vid.v v8
+vsetvli x28, x0, e32, m4, tu, mu
+vid.v v8
+vsetvli x28, x0, e32, m8, tu, mu
+vid.v v8
+vsetvli x28, x0, e64, m1, tu, mu
+vid.v v8
+vsetvli x28, x0, e64, m2, tu, mu
+vid.v v8
+vsetvli x28, x0, e64, m4, tu, mu
+vid.v v8
+vsetvli x28, x0, e64, m8, tu, mu
+vid.v v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vcpop.m x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vcpop.m x8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfirst.m x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfirst.m x8, v8
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAND_MM vmmv.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNAND_MM vmnot.m v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMANDN_MM vmandn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXOR_MM vmclr.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMOR_MM vmor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMNOR_MM vmnor.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMORN_MM vmorn.mm v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMXNOR_MM vmset.m v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBF_M vmsbf.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSIF_M vmsif.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSOF_M vmsof.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VID_V vid.v v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCPOP_M vcpop.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VFIRST_M vfirst.m s0, v8
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 301.00 - - - - 301.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmmv.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnot.m v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmandn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmclr.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmnor.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmorn.mm v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmset.m v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsbf.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsif.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmsof.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vid.v v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcpop.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vfirst.m s0, v8
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
new file mode 100644
index 0000000000000..4cc496b7de72e
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
@@ -0,0 +1,1108 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Min/max operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmax.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmax.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmax.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmax.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmaxu.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmaxu.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmaxu.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmaxu.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmin.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmin.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmin.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmin.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vminu.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vminu.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vminu.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vminu.vx v8, v8, x30
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 176.00 - - - - 176.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
new file mode 100644
index 0000000000000..5faf2628105f7
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
@@ -0,0 +1,2984 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Multiplication and division operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmul.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vmul.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vdiv.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vdiv.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vdiv.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vdiv.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vdivu.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vdivu.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vdivu.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vdivu.vx v8, v8, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vrem.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
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+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmul.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmul.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwmul.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwmul.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmulu.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmulu.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwmulu.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwmulu.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwmulsu.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwmulsu.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vwmulsu.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vwmulsu.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vsmul.vv v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vsmul.vv v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vsmul.vx v8, v8, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vsmul.vx v8, v8, x30
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 486.00 - - - - 486.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
new file mode 100644
index 0000000000000..fa53c08995c29
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
@@ -0,0 +1,3504 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Permutation and shuffle operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv.v.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv.v.v v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv.v.x v8, x8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv.v.x v8, x8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vmv.v.i v8, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vmv.v.i v8, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv.x.s x8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv.x.s x8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv.s.x v8, x8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv.s.x v8, x8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv1r.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv1r.v v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv2r.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv2r.v v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv4r.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv4r.v v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vmv8r.v v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vmv8r.v v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e8, mf4, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e8, mf8, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e8, m1, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e8, m2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e8, m4, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e8, m8, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e16, mf2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e16, mf4, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e16, m1, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e16, m2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e16, m4, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e16, m8, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e32, mf2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e32, m1, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e32, m2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e32, m4, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e32, m8, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e64, m1, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e64, m2, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e64, m4, tu, mu
+viota.m v8, v16
+vsetvli x28, x0, e64, m8, tu, mu
+viota.m v8, v16
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e8, m8, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e16, m8, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e32, m8, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e64, m1, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e64, m2, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e64, m4, tu, mu
+vcompress.vm v8, v16, v24
+vsetvli x28, x0, e64, m8, tu, mu
+vcompress.vm v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vslide1up.vx v8, v16, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vslide1up.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vslide1down.vx v8, v16, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vslide1down.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vslideup.vx v8, v16, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vslideup.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vslideup.vi v8, v16, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vslideup.vi v8, v16, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vslidedown.vx v8, v16, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vslidedown.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vslidedown.vi v8, v16, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vslidedown.vi v8, v16, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e8, m8, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e16, m8, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e32, m8, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e64, m1, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e64, m2, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e64, m4, tu, mu
+vrgather.vv v8, v16, v24
+vsetvli x28, x0, e64, m8, tu, mu
+vrgather.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e8, mf4, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e8, mf8, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e8, m1, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e8, m2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e8, m4, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e8, m8, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e16, mf2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e16, mf4, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e16, m1, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e16, m2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e16, m4, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e16, m8, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e32, mf2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e32, m1, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e32, m2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e32, m4, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e32, m8, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e64, m1, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e64, m2, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e64, m4, tu, mu
+vrgather.vx v8, v16, x30
+vsetvli x28, x0, e64, m8, tu, mu
+vrgather.vx v8, v16, x30
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e8, mf4, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e8, mf8, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e8, m1, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e8, m2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e8, m4, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e8, m8, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e16, mf2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e16, mf4, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e16, m1, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e16, m2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e16, m4, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e16, m8, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e32, mf2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e32, m1, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e32, m2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e32, m4, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e32, m8, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e64, m1, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e64, m2, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e64, m4, tu, mu
+vrgather.vi v8, v16, 12
+vsetvli x28, x0, e64, m8, tu, mu
+vrgather.vi v8, v16, 12
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vrgatherei16.vv v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e16, m8, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e32, m8, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e64, m1, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e64, m2, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e64, m4, tu, mu
+vrgatherei16.vv v8, v16, v24
+vsetvli x28, x0, e64, m8, tu, mu
+vrgatherei16.vv v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vmerge.vim v8, v8, 12, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vmerge.vim v8, v8, 12, v0
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vmerge.vvm v8, v8, v8, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vmerge.vvm v8, v8, v8, v0
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, mf4, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, mf8, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m1, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m4, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e8, m8, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, mf2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vmerge.vxm v8, v8, x30, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vmerge.vxm v8, v8, x30, v0
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e16, mf4, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e16, m1, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e16, m2, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e16, m4, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e16, m8, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e32, mf2, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e32, m1, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e32, m2, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e32, m4, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e32, m8, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e64, m1, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e64, m2, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e64, m4, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+vsetvli x28, x0, e64, m8, tu, mu
+vfmerge.vfm v8, v8, ft0, v0
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e16, mf4, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e16, m1, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e16, m2, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e16, m4, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e16, m8, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e32, mf2, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e32, m1, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e32, m2, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e32, m4, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e32, m8, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e64, m1, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e64, m2, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e64, m4, tu, mu
+vfslide1down.vf v8, v16, ft0
+vsetvli x28, x0, e64, m8, tu, mu
+vfslide1down.vf v8, v16, ft0
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e16, mf4, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e16, m1, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e16, m2, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e16, m4, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e16, m8, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e32, mf2, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e32, m1, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e32, m2, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e32, m4, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e32, m8, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e64, m1, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e64, m2, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e64, m4, tu, mu
+vfslide1up.vf v8, v16, ft0
+vsetvli x28, x0, e64, m8, tu, mu
+vfslide1up.vf v8, v16, ft0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_S_X vmv.s.x v8, s0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV1R_V vmv1r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV2R_V vmv2r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV4R_V vmv4r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV8R_V vmv8r.v v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VIOTA_M viota.m v8, v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VCOMPRESS_VM vcompress.vm v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1UP_VX vslide1up.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VX vslideup.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEUP_VI vslideup.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VV vrgather.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VX vrgather.vx v8, v16, t5
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHER_VI vrgather.vi v8, v16, 12
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 572.00 - - - 45.00 527.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
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+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
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+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
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+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
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+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
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+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
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+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
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+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv.s.x v8, s0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv1r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv2r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv4r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmv8r.v v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - viota.m v8, v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vcompress.vm v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1up.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslide1down.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslideup.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vslidedown.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vx v8, v16, t5
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgather.vi v8, v16, 12
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1down.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfslide1up.vf v8, v16, ft0
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-reduction.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-reduction.s
new file mode 100644
index 0000000000000..3d7a67d8ba161
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-reduction.s
@@ -0,0 +1,1824 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+# Reduction operations
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredand.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredand.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredmaxu.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredmaxu.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredmax.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredminu.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredminu.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredmin.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredor.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredor.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredsum.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredsum.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e8, mf4, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e8, mf8, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e8, m1, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e8, m2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e8, m4, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e8, m8, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e16, mf2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vredxor.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vredxor.vs v8, v8, v8
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e8, m8, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e16, m8, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwredsumu.vs v8, v16, v24
+vsetvli x28, x0, e32, m8, tu, mu
+vwredsumu.vs v8, v16, v24
+
+vsetvli x28, x0, e8, mf2, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e8, mf4, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e8, mf8, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e8, m1, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e8, m2, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e8, m4, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e8, m8, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e16, mf2, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e16, mf4, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e16, m1, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e16, m2, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e16, m4, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e16, m8, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e32, mf2, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e32, m1, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e32, m2, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e32, m4, tu, mu
+vwredsum.vs v8, v16, v24
+vsetvli x28, x0, e32, m8, tu, mu
+vwredsum.vs v8, v16, v24
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfredmax.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfredmax.vs v8, v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfredmin.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfredmin.vs v8, v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfredosum.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfredosum.vs v8, v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e64, m1, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e64, m2, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e64, m4, tu, mu
+vfredusum.vs v8, v8, v8
+vsetvli x28, x0, e64, m8, tu, mu
+vfredusum.vs v8, v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfwredosum.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfwredosum.vs v8, v8, v8
+
+vsetvli x28, x0, e16, mf2, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, mf4, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m1, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m2, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m4, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e16, m8, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, mf2, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m1, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m2, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m4, tu, mu
+vfwredusum.vs v8, v8, v8
+vsetvli x28, x0, e32, m8, tu, mu
+vfwredusum.vs v8, v8, v8
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v24
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMAX_VS vfredmax.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDMIN_VS vfredmin.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDOSUM_VS vfredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFREDUSUM_VS vfredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDOSUM_VS vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWREDUSUM_VS vfwredusum.vs v8, v8, v8
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 294.00 - - - 82.00 212.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v24
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmax.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredmin.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredosum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
+# CHECK-NEXT: - - - - - 1.00 - - vfwredusum.vs v8, v8, v8
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