[llvm] [LoongArch] Strengthen stack size estimation for LSX/LASX extension (PR #146455)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 16 01:19:31 PDT 2025
https://github.com/tangaac updated https://github.com/llvm/llvm-project/pull/146455
>From 873a4b81e6e46fbde7fcff5f4f77176ab5506867 Mon Sep 17 00:00:00 2001
From: tangaac <tangyan01 at loongson.cn>
Date: Tue, 1 Jul 2025 15:28:46 +0800
Subject: [PATCH 1/3] Strengthen stack size estimation for LSX/LASX extension
---
.../LoongArch/LoongArchFrameLowering.cpp | 7 +-
.../CodeGen/LoongArch/calling-conv-common.ll | 48 +++----
.../CodeGen/LoongArch/calling-conv-half.ll | 16 +--
.../LoongArch/can-not-realign-stack.ll | 44 +++---
.../CodeGen/LoongArch/emergency-spill-slot.ll | 4 +-
.../CodeGen/LoongArch/intrinsic-memcpy.ll | 8 +-
llvm/test/CodeGen/LoongArch/lasx/fpowi.ll | 88 ++++++------
.../lasx/ir-instruction/extractelement.ll | 120 ++++++++--------
.../ir-instruction/insert-extract-element.ll | 40 +++---
.../lasx/ir-instruction/insertelement.ll | 132 +++++++++---------
...realignment-with-variable-sized-objects.ll | 24 ++--
.../CodeGen/LoongArch/stack-realignment.ll | 80 +++++------
.../LoongArch/unaligned-memcpy-inline.ll | 14 +-
llvm/test/CodeGen/LoongArch/vararg.ll | 70 +++++-----
14 files changed, 350 insertions(+), 345 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp
index ac5e7f3891c72..1493bf4cba695 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp
@@ -158,7 +158,12 @@ void LoongArchFrameLowering::processFunctionBeforeFrameFinalized(
// estimateStackSize has been observed to under-estimate the final stack
// size, so give ourselves wiggle-room by checking for stack size
// representable an 11-bit signed field rather than 12-bits.
- if (!isInt<11>(MFI.estimateStackSize(MF)))
+ // For [x]vstelm.{b/h/w/d} memory instructions with 8 imm offset, 7-bit
+ // signed field is fine.
+ unsigned EstimateStackSize = MFI.estimateStackSize(MF);
+ if (!isInt<11>(EstimateStackSize) ||
+ (MF.getSubtarget<LoongArchSubtarget>().hasExtLSX() &&
+ !isInt<7>(EstimateStackSize)))
ScavSlotsNum = std::max(ScavSlotsNum, 1u);
// For CFR spill.
diff --git a/llvm/test/CodeGen/LoongArch/calling-conv-common.ll b/llvm/test/CodeGen/LoongArch/calling-conv-common.ll
index d07e2914c753a..f7653af1fa9ba 100644
--- a/llvm/test/CodeGen/LoongArch/calling-conv-common.ll
+++ b/llvm/test/CodeGen/LoongArch/calling-conv-common.ll
@@ -122,23 +122,23 @@ define i64 @callee_large_scalars(i256 %a, i256 %b) nounwind {
define i64 @caller_large_scalars() nounwind {
; CHECK-LABEL: caller_large_scalars:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -80
-; CHECK-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $zero, $sp, 24
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $zero, $sp, 40
; CHECK-NEXT: vrepli.b $vr0, 0
-; CHECK-NEXT: vst $vr0, $sp, 8
+; CHECK-NEXT: vst $vr0, $sp, 24
; CHECK-NEXT: ori $a0, $zero, 2
-; CHECK-NEXT: st.d $a0, $sp, 0
-; CHECK-NEXT: st.d $zero, $sp, 56
-; CHECK-NEXT: vst $vr0, $sp, 40
+; CHECK-NEXT: st.d $a0, $sp, 16
+; CHECK-NEXT: st.d $zero, $sp, 72
+; CHECK-NEXT: vst $vr0, $sp, 56
; CHECK-NEXT: ori $a2, $zero, 1
-; CHECK-NEXT: addi.d $a0, $sp, 32
-; CHECK-NEXT: addi.d $a1, $sp, 0
-; CHECK-NEXT: st.d $a2, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 48
+; CHECK-NEXT: addi.d $a1, $sp, 16
+; CHECK-NEXT: st.d $a2, $sp, 48
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_scalars)
; CHECK-NEXT: jirl $ra, $ra, 0
-; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 80
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%1 = call i64 @callee_large_scalars(i256 1, i256 2)
ret i64 %1
@@ -177,20 +177,20 @@ define i64 @callee_large_scalars_exhausted_regs(i64 %a, i64 %b, i64 %c, i64 %d,
define i64 @caller_large_scalars_exhausted_regs() nounwind {
; CHECK-LABEL: caller_large_scalars_exhausted_regs:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -96
-; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $a0, $sp, 16
+; CHECK-NEXT: addi.d $sp, $sp, -112
+; CHECK-NEXT: st.d $ra, $sp, 104 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: st.d $a0, $sp, 8
; CHECK-NEXT: ori $a0, $zero, 9
; CHECK-NEXT: st.d $a0, $sp, 0
-; CHECK-NEXT: st.d $zero, $sp, 40
+; CHECK-NEXT: st.d $zero, $sp, 56
; CHECK-NEXT: vrepli.b $vr0, 0
-; CHECK-NEXT: vst $vr0, $sp, 24
+; CHECK-NEXT: vst $vr0, $sp, 40
; CHECK-NEXT: ori $a0, $zero, 10
-; CHECK-NEXT: st.d $a0, $sp, 16
-; CHECK-NEXT: st.d $zero, $sp, 72
+; CHECK-NEXT: st.d $a0, $sp, 32
+; CHECK-NEXT: st.d $zero, $sp, 88
; CHECK-NEXT: ori $a0, $zero, 8
-; CHECK-NEXT: st.d $a0, $sp, 48
+; CHECK-NEXT: st.d $a0, $sp, 64
; CHECK-NEXT: ori $a0, $zero, 1
; CHECK-NEXT: ori $a1, $zero, 2
; CHECK-NEXT: ori $a2, $zero, 3
@@ -198,12 +198,12 @@ define i64 @caller_large_scalars_exhausted_regs() nounwind {
; CHECK-NEXT: ori $a4, $zero, 5
; CHECK-NEXT: ori $a5, $zero, 6
; CHECK-NEXT: ori $a6, $zero, 7
-; CHECK-NEXT: addi.d $a7, $sp, 48
-; CHECK-NEXT: vst $vr0, $sp, 56
+; CHECK-NEXT: addi.d $a7, $sp, 64
+; CHECK-NEXT: vst $vr0, $sp, 72
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_scalars_exhausted_regs)
; CHECK-NEXT: jirl $ra, $ra, 0
-; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 96
+; CHECK-NEXT: ld.d $ra, $sp, 104 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 112
; CHECK-NEXT: ret
%1 = call i64 @callee_large_scalars_exhausted_regs(
i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i256 8, i64 9,
diff --git a/llvm/test/CodeGen/LoongArch/calling-conv-half.ll b/llvm/test/CodeGen/LoongArch/calling-conv-half.ll
index c88b67f13d1e7..da8c3e93f6842 100644
--- a/llvm/test/CodeGen/LoongArch/calling-conv-half.ll
+++ b/llvm/test/CodeGen/LoongArch/calling-conv-half.ll
@@ -1252,8 +1252,8 @@ define i32 @caller_half_on_stack() nounwind {
;
; LA64F-LP64S-LABEL: caller_half_on_stack:
; LA64F-LP64S: # %bb.0:
-; LA64F-LP64S-NEXT: addi.d $sp, $sp, -80
-; LA64F-LP64S-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
+; LA64F-LP64S-NEXT: addi.d $sp, $sp, -96
+; LA64F-LP64S-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
; LA64F-LP64S-NEXT: lu12i.w $a0, -12
; LA64F-LP64S-NEXT: ori $a1, $a0, 3200
; LA64F-LP64S-NEXT: lu32i.d $a1, 0
@@ -1292,8 +1292,8 @@ define i32 @caller_half_on_stack() nounwind {
; LA64F-LP64S-NEXT: st.w $t0, $sp, 0
; LA64F-LP64S-NEXT: pcaddu18i $ra, %call36(callee_half_on_stack)
; LA64F-LP64S-NEXT: jirl $ra, $ra, 0
-; LA64F-LP64S-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
-; LA64F-LP64S-NEXT: addi.d $sp, $sp, 80
+; LA64F-LP64S-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; LA64F-LP64S-NEXT: addi.d $sp, $sp, 96
; LA64F-LP64S-NEXT: ret
;
; LA64F-LP64D-LABEL: caller_half_on_stack:
@@ -1336,8 +1336,8 @@ define i32 @caller_half_on_stack() nounwind {
;
; LA64D-LP64S-LABEL: caller_half_on_stack:
; LA64D-LP64S: # %bb.0:
-; LA64D-LP64S-NEXT: addi.d $sp, $sp, -80
-; LA64D-LP64S-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
+; LA64D-LP64S-NEXT: addi.d $sp, $sp, -96
+; LA64D-LP64S-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
; LA64D-LP64S-NEXT: lu12i.w $a0, -12
; LA64D-LP64S-NEXT: ori $a1, $a0, 3200
; LA64D-LP64S-NEXT: lu32i.d $a1, 0
@@ -1376,8 +1376,8 @@ define i32 @caller_half_on_stack() nounwind {
; LA64D-LP64S-NEXT: st.w $t0, $sp, 0
; LA64D-LP64S-NEXT: pcaddu18i $ra, %call36(callee_half_on_stack)
; LA64D-LP64S-NEXT: jirl $ra, $ra, 0
-; LA64D-LP64S-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
-; LA64D-LP64S-NEXT: addi.d $sp, $sp, 80
+; LA64D-LP64S-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; LA64D-LP64S-NEXT: addi.d $sp, $sp, 96
; LA64D-LP64S-NEXT: ret
;
; LA64D-LP64D-LABEL: caller_half_on_stack:
diff --git a/llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll b/llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
index 52d8dd05aaa4c..1a9de3b0ef3d1 100644
--- a/llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
+++ b/llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
@@ -14,41 +14,41 @@
define dso_local noundef signext i32 @main() nounwind {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -272
-; CHECK-NEXT: st.d $ra, $sp, 264 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $sp, $sp, -288
+; CHECK-NEXT: st.d $ra, $sp, 280 # 8-byte Folded Spill
; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI0_0)
; CHECK-NEXT: xvld $xr0, $a0, %pc_lo12(.LCPI0_0)
-; CHECK-NEXT: xvst $xr0, $sp, 96 # 32-byte Folded Spill
+; CHECK-NEXT: xvst $xr0, $sp, 112 # 32-byte Folded Spill
; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI0_1)
; CHECK-NEXT: xvld $xr1, $a0, %pc_lo12(.LCPI0_1)
-; CHECK-NEXT: xvst $xr1, $sp, 64 # 32-byte Folded Spill
+; CHECK-NEXT: xvst $xr1, $sp, 80 # 32-byte Folded Spill
; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI0_2)
; CHECK-NEXT: xvld $xr2, $a0, %pc_lo12(.LCPI0_2)
-; CHECK-NEXT: xvst $xr2, $sp, 32 # 32-byte Folded Spill
+; CHECK-NEXT: xvst $xr2, $sp, 48 # 32-byte Folded Spill
; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI0_3)
; CHECK-NEXT: xvld $xr3, $a0, %pc_lo12(.LCPI0_3)
-; CHECK-NEXT: xvst $xr3, $sp, 0 # 32-byte Folded Spill
-; CHECK-NEXT: xvst $xr0, $sp, 136
-; CHECK-NEXT: xvst $xr1, $sp, 168
-; CHECK-NEXT: xvst $xr2, $sp, 200
-; CHECK-NEXT: xvst $xr3, $sp, 232
-; CHECK-NEXT: addi.d $a0, $sp, 136
+; CHECK-NEXT: xvst $xr3, $sp, 16 # 32-byte Folded Spill
+; CHECK-NEXT: xvst $xr0, $sp, 152
+; CHECK-NEXT: xvst $xr1, $sp, 184
+; CHECK-NEXT: xvst $xr2, $sp, 216
+; CHECK-NEXT: xvst $xr3, $sp, 248
+; CHECK-NEXT: addi.d $a0, $sp, 152
; CHECK-NEXT: pcaddu18i $ra, %call36(foo)
; CHECK-NEXT: jirl $ra, $ra, 0
-; CHECK-NEXT: xvld $xr0, $sp, 96 # 32-byte Folded Reload
-; CHECK-NEXT: xvst $xr0, $sp, 136
-; CHECK-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
-; CHECK-NEXT: xvst $xr0, $sp, 168
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
-; CHECK-NEXT: xvst $xr0, $sp, 200
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
-; CHECK-NEXT: xvst $xr0, $sp, 232
-; CHECK-NEXT: addi.d $a0, $sp, 136
+; CHECK-NEXT: xvld $xr0, $sp, 112 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 152
+; CHECK-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 184
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 216
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 248
+; CHECK-NEXT: addi.d $a0, $sp, 152
; CHECK-NEXT: pcaddu18i $ra, %call36(bar)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: move $a0, $zero
-; CHECK-NEXT: ld.d $ra, $sp, 264 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 272
+; CHECK-NEXT: ld.d $ra, $sp, 280 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 288
; CHECK-NEXT: ret
entry:
%s = alloca %struct.S, align 2
diff --git a/llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll b/llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll
index ccc5c703e71ed..15ac95dfc6c55 100644
--- a/llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll
+++ b/llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll
@@ -28,12 +28,12 @@ define void @func() {
; CHECK-NEXT: ld.w $a3, $a1, 0
; CHECK-NEXT: ld.w $a2, $a1, 0
; CHECK-NEXT: ld.w $a0, $a1, 0
-; CHECK-NEXT: st.d $fp, $sp, 0
+; CHECK-NEXT: st.d $fp, $sp, 0 # 8-byte Folded Spill
; CHECK-NEXT: lu12i.w $fp, 1
; CHECK-NEXT: ori $fp, $fp, 12
; CHECK-NEXT: add.d $fp, $sp, $fp
; CHECK-NEXT: st.w $t8, $fp, 0
-; CHECK-NEXT: ld.d $fp, $sp, 0
+; CHECK-NEXT: ld.d $fp, $sp, 0 # 8-byte Folded Reload
; CHECK-NEXT: st.w $t8, $a1, 0
; CHECK-NEXT: st.w $t7, $a1, 0
; CHECK-NEXT: st.w $t6, $a1, 0
diff --git a/llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll b/llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
index 402ddb9ad941b..5a55b253c77bb 100644
--- a/llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
+++ b/llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
@@ -6,11 +6,11 @@
define void @box(ptr noalias nocapture noundef writeonly sret(%Box) align 16 dereferenceable(48) %b, i64 %i) {
; CHECK-LABEL: box:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -96
-; CHECK-NEXT: .cfi_def_cfa_offset 96
+; CHECK-NEXT: addi.d $sp, $sp, -112
+; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: slli.d $a2, $a1, 5
; CHECK-NEXT: alsl.d $a1, $a1, $a2, 4
-; CHECK-NEXT: addi.d $a2, $sp, 0
+; CHECK-NEXT: addi.d $a2, $sp, 16
; CHECK-NEXT: add.d $a3, $a2, $a1
; CHECK-NEXT: vldx $vr0, $a1, $a2
; CHECK-NEXT: vld $vr1, $a3, 32
@@ -18,7 +18,7 @@ define void @box(ptr noalias nocapture noundef writeonly sret(%Box) align 16 der
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: vst $vr1, $a0, 32
; CHECK-NEXT: vst $vr2, $a0, 16
-; CHECK-NEXT: addi.d $sp, $sp, 96
+; CHECK-NEXT: addi.d $sp, $sp, 112
; CHECK-NEXT: ret
%1 = alloca [2 x %Box], align 16
%2 = getelementptr inbounds [2 x %Box], ptr %1, i64 0, i64 %i
diff --git a/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll b/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
index 789b51d9b5e5b..9528280d181a3 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
@@ -6,10 +6,10 @@ declare <8 x float> @llvm.powi.v8f32.i32(<8 x float>, i32)
define <8 x float> @powi_v8f32(<8 x float> %va, i32 %b) nounwind {
; CHECK-LABEL: powi_v8f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -80
-; CHECK-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
-; CHECK-NEXT: xvst $xr0, $sp, 0 # 32-byte Folded Spill
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: xvst $xr0, $sp, 16 # 32-byte Folded Spill
; CHECK-NEXT: addi.w $fp, $a0, 0
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 0
; CHECK-NEXT: movgr2fr.w $fa0, $a0
@@ -18,79 +18,79 @@ define <8 x float> @powi_v8f32(<8 x float> %va, i32 %b) nounwind {
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 1
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 1
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 2
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 2
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 3
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 3
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 4
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 4
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 5
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 5
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 6
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 6
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 7
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powisf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 7
-; CHECK-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 80
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
entry:
%res = call <8 x float> @llvm.powi.v8f32.i32(<8 x float> %va, i32 %b)
@@ -102,10 +102,10 @@ declare <4 x double> @llvm.powi.v4f64.i32(<4 x double>, i32)
define <4 x double> @powi_v4f64(<4 x double> %va, i32 %b) nounwind {
; CHECK-LABEL: powi_v4f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -80
-; CHECK-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
-; CHECK-NEXT: xvst $xr0, $sp, 0 # 32-byte Folded Spill
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: xvst $xr0, $sp, 16 # 32-byte Folded Spill
; CHECK-NEXT: addi.w $fp, $a0, 0
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 0
; CHECK-NEXT: movgr2fr.d $fa0, $a0
@@ -114,39 +114,39 @@ define <4 x double> @powi_v4f64(<4 x double> %va, i32 %b) nounwind {
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 1
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powidf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 1
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 2
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powidf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 2
-; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
-; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
+; CHECK-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
+; CHECK-NEXT: xvld $xr0, $sp, 16 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 3
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: pcaddu18i $ra, %call36(__powidf2)
; CHECK-NEXT: jirl $ra, $ra, 0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
-; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 3
-; CHECK-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 80
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
entry:
%res = call <4 x double> @llvm.powi.v4f64.i32(<4 x double> %va, i32 %b)
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
index 04214f5dfa9d2..2e1618748688a 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
@@ -76,21 +76,21 @@ define void @extract_4xdouble(ptr %src, ptr %dst) nounwind {
define void @extract_32xi8_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_32xi8_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 0
; CHECK-NEXT: ld.b $a0, $a0, 0
; CHECK-NEXT: st.b $a0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <32 x i8>, ptr %src
%e = extractelement <32 x i8> %v, i32 %idx
@@ -101,21 +101,21 @@ define void @extract_32xi8_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_16xi16_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_16xi16_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 1
; CHECK-NEXT: ld.h $a0, $a0, 0
; CHECK-NEXT: st.h $a0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <16 x i16>, ptr %src
%e = extractelement <16 x i16> %v, i32 %idx
@@ -126,21 +126,21 @@ define void @extract_16xi16_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_8xi32_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_8xi32_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 2
; CHECK-NEXT: ld.w $a0, $a0, 0
; CHECK-NEXT: st.w $a0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <8 x i32>, ptr %src
%e = extractelement <8 x i32> %v, i32 %idx
@@ -151,21 +151,21 @@ define void @extract_8xi32_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_4xi64_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_4xi64_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 3
; CHECK-NEXT: ld.d $a0, $a0, 0
; CHECK-NEXT: st.d $a0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <4 x i64>, ptr %src
%e = extractelement <4 x i64> %v, i32 %idx
@@ -176,21 +176,21 @@ define void @extract_4xi64_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_8xfloat_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_8xfloat_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 2
; CHECK-NEXT: fld.s $fa0, $a0, 0
; CHECK-NEXT: fst.s $fa0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <8 x float>, ptr %src
%e = extractelement <8 x float> %v, i32 %idx
@@ -201,21 +201,21 @@ define void @extract_8xfloat_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_4xdouble_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_4xdouble_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 3
; CHECK-NEXT: fld.d $fa0, $a0, 0
; CHECK-NEXT: fst.d $fa0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <4 x double>, ptr %src
%e = extractelement <4 x double> %v, i32 %idx
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
index 3fdc439e68679..c3d09953fbc44 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
@@ -4,18 +4,18 @@
define <32 x i8> @insert_extract_v32i8(<32 x i8> %a) nounwind {
; CHECK-LABEL: insert_extract_v32i8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: ld.b $a0, $sp, 31
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: ld.b $a0, $sp, 63
; CHECK-NEXT: vinsgr2vr.b $vr0, $a0, 1
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
entry:
%b = extractelement <32 x i8> %a, i32 31
@@ -26,18 +26,18 @@ entry:
define <16 x i16> @insert_extract_v16i16(<16 x i16> %a) nounwind {
; CHECK-LABEL: insert_extract_v16i16:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: ld.h $a0, $sp, 30
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: ld.h $a0, $sp, 62
; CHECK-NEXT: vinsgr2vr.h $vr0, $a0, 1
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
entry:
%b = extractelement <16 x i16> %a, i32 15
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
index 25106b456d2f7..a6c0b332abcb9 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
@@ -116,22 +116,22 @@ define void @insert_4xdouble(ptr %src, ptr %dst, double %in) nounwind {
define void @insert_32xi8_idx(ptr %src, ptr %dst, i8 %in, i32 %idx) nounwind {
; CHECK-LABEL: insert_32xi8_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a3, 4, 0
; CHECK-NEXT: st.b $a2, $a0, 0
-; CHECK-NEXT: xvld $xr0, $sp, 0
+; CHECK-NEXT: xvld $xr0, $sp, 32
; CHECK-NEXT: xvst $xr0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <32 x i8>, ptr %src
%v_new = insertelement <32 x i8> %v, i8 %in, i32 %idx
@@ -142,22 +142,22 @@ define void @insert_32xi8_idx(ptr %src, ptr %dst, i8 %in, i32 %idx) nounwind {
define void @insert_16xi16_idx(ptr %src, ptr %dst, i16 %in, i32 %idx) nounwind {
; CHECK-LABEL: insert_16xi16_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a3, 4, 1
; CHECK-NEXT: st.h $a2, $a0, 0
-; CHECK-NEXT: xvld $xr0, $sp, 0
+; CHECK-NEXT: xvld $xr0, $sp, 32
; CHECK-NEXT: xvst $xr0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <16 x i16>, ptr %src
%v_new = insertelement <16 x i16> %v, i16 %in, i32 %idx
@@ -168,22 +168,22 @@ define void @insert_16xi16_idx(ptr %src, ptr %dst, i16 %in, i32 %idx) nounwind {
define void @insert_8xi32_idx(ptr %src, ptr %dst, i32 %in, i32 %idx) nounwind {
; CHECK-LABEL: insert_8xi32_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a3, 4, 2
; CHECK-NEXT: st.w $a2, $a0, 0
-; CHECK-NEXT: xvld $xr0, $sp, 0
+; CHECK-NEXT: xvld $xr0, $sp, 32
; CHECK-NEXT: xvst $xr0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <8 x i32>, ptr %src
%v_new = insertelement <8 x i32> %v, i32 %in, i32 %idx
@@ -194,22 +194,22 @@ define void @insert_8xi32_idx(ptr %src, ptr %dst, i32 %in, i32 %idx) nounwind {
define void @insert_4xi64_idx(ptr %src, ptr %dst, i64 %in, i32 %idx) nounwind {
; CHECK-LABEL: insert_4xi64_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr0, $a0, 0
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a3, 4, 3
; CHECK-NEXT: st.d $a2, $a0, 0
-; CHECK-NEXT: xvld $xr0, $sp, 0
+; CHECK-NEXT: xvld $xr0, $sp, 32
; CHECK-NEXT: xvst $xr0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <4 x i64>, ptr %src
%v_new = insertelement <4 x i64> %v, i64 %in, i32 %idx
@@ -220,22 +220,22 @@ define void @insert_4xi64_idx(ptr %src, ptr %dst, i64 %in, i32 %idx) nounwind {
define void @insert_8xfloat_idx(ptr %src, ptr %dst, float %in, i32 %idx) nounwind {
; CHECK-LABEL: insert_8xfloat_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr1, $a0, 0
-; CHECK-NEXT: xvst $xr1, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr1, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 2
; CHECK-NEXT: fst.s $fa0, $a0, 0
-; CHECK-NEXT: xvld $xr0, $sp, 0
+; CHECK-NEXT: xvld $xr0, $sp, 32
; CHECK-NEXT: xvst $xr0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <8 x float>, ptr %src
%v_new = insertelement <8 x float> %v, float %in, i32 %idx
@@ -246,22 +246,22 @@ define void @insert_8xfloat_idx(ptr %src, ptr %dst, float %in, i32 %idx) nounwin
define void @insert_4xdouble_idx(ptr %src, ptr %dst, double %in, i32 %idx) nounwind {
; CHECK-LABEL: insert_4xdouble_idx:
; CHECK: # %bb.0:
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: xvld $xr1, $a0, 0
-; CHECK-NEXT: xvst $xr1, $sp, 0
-; CHECK-NEXT: addi.d $a0, $sp, 0
+; CHECK-NEXT: xvst $xr1, $sp, 32
+; CHECK-NEXT: addi.d $a0, $sp, 32
; CHECK-NEXT: bstrins.d $a0, $a2, 4, 3
; CHECK-NEXT: fst.d $fa0, $a0, 0
-; CHECK-NEXT: xvld $xr0, $sp, 0
+; CHECK-NEXT: xvld $xr0, $sp, 32
; CHECK-NEXT: xvst $xr0, $a1, 0
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
%v = load volatile <4 x double>, ptr %src
%v_new = insertelement <4 x double> %v, double %in, i32 %idx
diff --git a/llvm/test/CodeGen/LoongArch/stack-realignment-with-variable-sized-objects.ll b/llvm/test/CodeGen/LoongArch/stack-realignment-with-variable-sized-objects.ll
index 9f15604fcca6b..69995a0721f8a 100644
--- a/llvm/test/CodeGen/LoongArch/stack-realignment-with-variable-sized-objects.ll
+++ b/llvm/test/CodeGen/LoongArch/stack-realignment-with-variable-sized-objects.ll
@@ -36,15 +36,15 @@ define void @caller(i32 %n) {
;
; LA64-LABEL: caller:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -64
-; LA64-NEXT: .cfi_def_cfa_offset 64
-; LA64-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; LA64-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s8, $sp, 40 # 8-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -128
+; LA64-NEXT: .cfi_def_cfa_offset 128
+; LA64-NEXT: st.d $ra, $sp, 120 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 112 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s8, $sp, 104 # 8-byte Folded Spill
; LA64-NEXT: .cfi_offset 1, -8
; LA64-NEXT: .cfi_offset 22, -16
; LA64-NEXT: .cfi_offset 31, -24
-; LA64-NEXT: addi.d $fp, $sp, 64
+; LA64-NEXT: addi.d $fp, $sp, 128
; LA64-NEXT: .cfi_def_cfa 22, 0
; LA64-NEXT: bstrins.d $sp, $zero, 5, 0
; LA64-NEXT: move $s8, $sp
@@ -54,14 +54,14 @@ define void @caller(i32 %n) {
; LA64-NEXT: slli.d $a0, $a0, 4
; LA64-NEXT: sub.d $a0, $sp, $a0
; LA64-NEXT: move $sp, $a0
-; LA64-NEXT: addi.d $a1, $s8, 0
+; LA64-NEXT: addi.d $a1, $s8, 64
; LA64-NEXT: pcaddu18i $ra, %call36(callee)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: addi.d $sp, $fp, -64
-; LA64-NEXT: ld.d $s8, $sp, 40 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 64
+; LA64-NEXT: addi.d $sp, $fp, -128
+; LA64-NEXT: ld.d $s8, $sp, 104 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $fp, $sp, 112 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 120 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 128
; LA64-NEXT: ret
%1 = alloca i8, i32 %n
%2 = alloca i32, align 64
diff --git a/llvm/test/CodeGen/LoongArch/stack-realignment.ll b/llvm/test/CodeGen/LoongArch/stack-realignment.ll
index 0645339358b64..0188884543adb 100644
--- a/llvm/test/CodeGen/LoongArch/stack-realignment.ll
+++ b/llvm/test/CodeGen/LoongArch/stack-realignment.ll
@@ -28,22 +28,22 @@ define void @caller32() {
;
; LA64-LABEL: caller32:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -32
-; LA64-NEXT: .cfi_def_cfa_offset 32
-; LA64-NEXT: st.d $ra, $sp, 24 # 8-byte Folded Spill
-; LA64-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -64
+; LA64-NEXT: .cfi_def_cfa_offset 64
+; LA64-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
; LA64-NEXT: .cfi_offset 1, -8
; LA64-NEXT: .cfi_offset 22, -16
-; LA64-NEXT: addi.d $fp, $sp, 32
+; LA64-NEXT: addi.d $fp, $sp, 64
; LA64-NEXT: .cfi_def_cfa 22, 0
; LA64-NEXT: bstrins.d $sp, $zero, 4, 0
-; LA64-NEXT: addi.d $a0, $sp, 0
+; LA64-NEXT: addi.d $a0, $sp, 32
; LA64-NEXT: pcaddu18i $ra, %call36(callee)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: addi.d $sp, $fp, -32
-; LA64-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 32
+; LA64-NEXT: addi.d $sp, $fp, -64
+; LA64-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 64
; LA64-NEXT: ret
%1 = alloca i8, align 32
call void @callee(ptr %1)
@@ -102,22 +102,22 @@ define void @caller64() {
;
; LA64-LABEL: caller64:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -64
-; LA64-NEXT: .cfi_def_cfa_offset 64
-; LA64-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; LA64-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -128
+; LA64-NEXT: .cfi_def_cfa_offset 128
+; LA64-NEXT: st.d $ra, $sp, 120 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 112 # 8-byte Folded Spill
; LA64-NEXT: .cfi_offset 1, -8
; LA64-NEXT: .cfi_offset 22, -16
-; LA64-NEXT: addi.d $fp, $sp, 64
+; LA64-NEXT: addi.d $fp, $sp, 128
; LA64-NEXT: .cfi_def_cfa 22, 0
; LA64-NEXT: bstrins.d $sp, $zero, 5, 0
-; LA64-NEXT: addi.d $a0, $sp, 0
+; LA64-NEXT: addi.d $a0, $sp, 64
; LA64-NEXT: pcaddu18i $ra, %call36(callee)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: addi.d $sp, $fp, -64
-; LA64-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 64
+; LA64-NEXT: addi.d $sp, $fp, -128
+; LA64-NEXT: ld.d $fp, $sp, 112 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 120 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 128
; LA64-NEXT: ret
%1 = alloca i8, align 64
call void @callee(ptr %1)
@@ -176,22 +176,22 @@ define void @caller128() {
;
; LA64-LABEL: caller128:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -128
-; LA64-NEXT: .cfi_def_cfa_offset 128
-; LA64-NEXT: st.d $ra, $sp, 120 # 8-byte Folded Spill
-; LA64-NEXT: st.d $fp, $sp, 112 # 8-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -256
+; LA64-NEXT: .cfi_def_cfa_offset 256
+; LA64-NEXT: st.d $ra, $sp, 248 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 240 # 8-byte Folded Spill
; LA64-NEXT: .cfi_offset 1, -8
; LA64-NEXT: .cfi_offset 22, -16
-; LA64-NEXT: addi.d $fp, $sp, 128
+; LA64-NEXT: addi.d $fp, $sp, 256
; LA64-NEXT: .cfi_def_cfa 22, 0
; LA64-NEXT: bstrins.d $sp, $zero, 6, 0
-; LA64-NEXT: addi.d $a0, $sp, 0
+; LA64-NEXT: addi.d $a0, $sp, 128
; LA64-NEXT: pcaddu18i $ra, %call36(callee)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: addi.d $sp, $fp, -128
-; LA64-NEXT: ld.d $fp, $sp, 112 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 120 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 128
+; LA64-NEXT: addi.d $sp, $fp, -256
+; LA64-NEXT: ld.d $fp, $sp, 240 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 248 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 256
; LA64-NEXT: ret
%1 = alloca i8, align 128
call void @callee(ptr %1)
@@ -250,22 +250,22 @@ define void @caller256() {
;
; LA64-LABEL: caller256:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -256
-; LA64-NEXT: .cfi_def_cfa_offset 256
-; LA64-NEXT: st.d $ra, $sp, 248 # 8-byte Folded Spill
-; LA64-NEXT: st.d $fp, $sp, 240 # 8-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -512
+; LA64-NEXT: .cfi_def_cfa_offset 512
+; LA64-NEXT: st.d $ra, $sp, 504 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 496 # 8-byte Folded Spill
; LA64-NEXT: .cfi_offset 1, -8
; LA64-NEXT: .cfi_offset 22, -16
-; LA64-NEXT: addi.d $fp, $sp, 256
+; LA64-NEXT: addi.d $fp, $sp, 512
; LA64-NEXT: .cfi_def_cfa 22, 0
; LA64-NEXT: bstrins.d $sp, $zero, 7, 0
-; LA64-NEXT: addi.d $a0, $sp, 0
+; LA64-NEXT: addi.d $a0, $sp, 256
; LA64-NEXT: pcaddu18i $ra, %call36(callee)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: addi.d $sp, $fp, -256
-; LA64-NEXT: ld.d $fp, $sp, 240 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 248 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 256
+; LA64-NEXT: addi.d $sp, $fp, -512
+; LA64-NEXT: ld.d $fp, $sp, 496 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 504 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 512
; LA64-NEXT: ret
%1 = alloca i8, align 256
call void @callee(ptr %1)
diff --git a/llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll b/llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll
index 925fdf3d60646..0d441e66a0c84 100644
--- a/llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll
+++ b/llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll
@@ -121,19 +121,19 @@ define void @t3() {
;
; LA64-LABEL: t3:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: addi.d $sp, $sp, -64
-; LA64-NEXT: .cfi_def_cfa_offset 64
+; LA64-NEXT: addi.d $sp, $sp, -80
+; LA64-NEXT: .cfi_def_cfa_offset 80
; LA64-NEXT: pcalau12i $a0, %pc_hi20(.L.str)
; LA64-NEXT: addi.d $a0, $a0, %pc_lo12(.L.str)
; LA64-NEXT: ld.h $a1, $a0, 20
; LA64-NEXT: ld.w $a2, $a0, 16
; LA64-NEXT: ld.d $a3, $a0, 8
; LA64-NEXT: ld.d $a0, $a0, 0
-; LA64-NEXT: st.h $a1, $sp, 20
-; LA64-NEXT: st.w $a2, $sp, 16
-; LA64-NEXT: st.d $a3, $sp, 8
-; LA64-NEXT: st.d $a0, $sp, 0
-; LA64-NEXT: addi.d $sp, $sp, 64
+; LA64-NEXT: st.h $a1, $sp, 36
+; LA64-NEXT: st.w $a2, $sp, 32
+; LA64-NEXT: st.d $a3, $sp, 24
+; LA64-NEXT: st.d $a0, $sp, 16
+; LA64-NEXT: addi.d $sp, $sp, 80
; LA64-NEXT: ret
entry:
%msgbuf = alloca [64 x i8], align 1
diff --git a/llvm/test/CodeGen/LoongArch/vararg.ll b/llvm/test/CodeGen/LoongArch/vararg.ll
index 939cd2015c5b1..bc4b8a77c7e15 100644
--- a/llvm/test/CodeGen/LoongArch/vararg.ll
+++ b/llvm/test/CodeGen/LoongArch/vararg.ll
@@ -47,7 +47,7 @@ define i64 @va1(ptr %fmt, ...) {
; LA64-WITHFP-NEXT: st.d $a2, $fp, 16
; LA64-WITHFP-NEXT: st.d $a1, $fp, 8
; LA64-WITHFP-NEXT: addi.d $a1, $fp, 16
-; LA64-WITHFP-NEXT: st.d $a1, $fp, -24
+; LA64-WITHFP-NEXT: st.d $a1, $fp, -32
; LA64-WITHFP-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
; LA64-WITHFP-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
; LA64-WITHFP-NEXT: addi.d $sp, $sp, 96
@@ -94,7 +94,7 @@ define i64 @va1_va_arg(ptr %fmt, ...) nounwind {
; LA64-WITHFP-NEXT: st.d $a2, $fp, 16
; LA64-WITHFP-NEXT: st.d $a1, $fp, 8
; LA64-WITHFP-NEXT: addi.d $a1, $fp, 16
-; LA64-WITHFP-NEXT: st.d $a1, $fp, -24
+; LA64-WITHFP-NEXT: st.d $a1, $fp, -32
; LA64-WITHFP-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
; LA64-WITHFP-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
; LA64-WITHFP-NEXT: addi.d $sp, $sp, 96
@@ -112,11 +112,11 @@ define i64 @va1_va_arg(ptr %fmt, ...) nounwind {
define i64 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LA64-FPELIM-LABEL: va1_va_arg_alloca:
; LA64-FPELIM: # %bb.0:
-; LA64-FPELIM-NEXT: addi.d $sp, $sp, -96
-; LA64-FPELIM-NEXT: st.d $ra, $sp, 24 # 8-byte Folded Spill
-; LA64-FPELIM-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
-; LA64-FPELIM-NEXT: st.d $s0, $sp, 8 # 8-byte Folded Spill
-; LA64-FPELIM-NEXT: addi.d $fp, $sp, 32
+; LA64-FPELIM-NEXT: addi.d $sp, $sp, -112
+; LA64-FPELIM-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
+; LA64-FPELIM-NEXT: st.d $fp, $sp, 32 # 8-byte Folded Spill
+; LA64-FPELIM-NEXT: st.d $s0, $sp, 24 # 8-byte Folded Spill
+; LA64-FPELIM-NEXT: addi.d $fp, $sp, 48
; LA64-FPELIM-NEXT: move $s0, $a1
; LA64-FPELIM-NEXT: st.d $a7, $fp, 56
; LA64-FPELIM-NEXT: st.d $a6, $fp, 48
@@ -126,7 +126,7 @@ define i64 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LA64-FPELIM-NEXT: st.d $a2, $fp, 16
; LA64-FPELIM-NEXT: st.d $a1, $fp, 8
; LA64-FPELIM-NEXT: addi.d $a0, $fp, 16
-; LA64-FPELIM-NEXT: st.d $a0, $fp, -32
+; LA64-FPELIM-NEXT: st.d $a0, $fp, -40
; LA64-FPELIM-NEXT: addi.d $a0, $a1, 15
; LA64-FPELIM-NEXT: bstrins.d $a0, $zero, 3, 0
; LA64-FPELIM-NEXT: sub.d $a0, $sp, $a0
@@ -134,20 +134,20 @@ define i64 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LA64-FPELIM-NEXT: pcaddu18i $ra, %call36(notdead)
; LA64-FPELIM-NEXT: jirl $ra, $ra, 0
; LA64-FPELIM-NEXT: move $a0, $s0
-; LA64-FPELIM-NEXT: addi.d $sp, $fp, -32
-; LA64-FPELIM-NEXT: ld.d $s0, $sp, 8 # 8-byte Folded Reload
-; LA64-FPELIM-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
-; LA64-FPELIM-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
-; LA64-FPELIM-NEXT: addi.d $sp, $sp, 96
+; LA64-FPELIM-NEXT: addi.d $sp, $fp, -48
+; LA64-FPELIM-NEXT: ld.d $s0, $sp, 24 # 8-byte Folded Reload
+; LA64-FPELIM-NEXT: ld.d $fp, $sp, 32 # 8-byte Folded Reload
+; LA64-FPELIM-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
+; LA64-FPELIM-NEXT: addi.d $sp, $sp, 112
; LA64-FPELIM-NEXT: ret
;
; LA64-WITHFP-LABEL: va1_va_arg_alloca:
; LA64-WITHFP: # %bb.0:
-; LA64-WITHFP-NEXT: addi.d $sp, $sp, -96
-; LA64-WITHFP-NEXT: st.d $ra, $sp, 24 # 8-byte Folded Spill
-; LA64-WITHFP-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
-; LA64-WITHFP-NEXT: st.d $s0, $sp, 8 # 8-byte Folded Spill
-; LA64-WITHFP-NEXT: addi.d $fp, $sp, 32
+; LA64-WITHFP-NEXT: addi.d $sp, $sp, -112
+; LA64-WITHFP-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
+; LA64-WITHFP-NEXT: st.d $fp, $sp, 32 # 8-byte Folded Spill
+; LA64-WITHFP-NEXT: st.d $s0, $sp, 24 # 8-byte Folded Spill
+; LA64-WITHFP-NEXT: addi.d $fp, $sp, 48
; LA64-WITHFP-NEXT: move $s0, $a1
; LA64-WITHFP-NEXT: st.d $a7, $fp, 56
; LA64-WITHFP-NEXT: st.d $a6, $fp, 48
@@ -157,7 +157,7 @@ define i64 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LA64-WITHFP-NEXT: st.d $a2, $fp, 16
; LA64-WITHFP-NEXT: st.d $a1, $fp, 8
; LA64-WITHFP-NEXT: addi.d $a0, $fp, 16
-; LA64-WITHFP-NEXT: st.d $a0, $fp, -32
+; LA64-WITHFP-NEXT: st.d $a0, $fp, -40
; LA64-WITHFP-NEXT: addi.d $a0, $a1, 15
; LA64-WITHFP-NEXT: bstrins.d $a0, $zero, 3, 0
; LA64-WITHFP-NEXT: sub.d $a0, $sp, $a0
@@ -165,11 +165,11 @@ define i64 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LA64-WITHFP-NEXT: pcaddu18i $ra, %call36(notdead)
; LA64-WITHFP-NEXT: jirl $ra, $ra, 0
; LA64-WITHFP-NEXT: move $a0, $s0
-; LA64-WITHFP-NEXT: addi.d $sp, $fp, -32
-; LA64-WITHFP-NEXT: ld.d $s0, $sp, 8 # 8-byte Folded Reload
-; LA64-WITHFP-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
-; LA64-WITHFP-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
-; LA64-WITHFP-NEXT: addi.d $sp, $sp, 96
+; LA64-WITHFP-NEXT: addi.d $sp, $fp, -48
+; LA64-WITHFP-NEXT: ld.d $s0, $sp, 24 # 8-byte Folded Reload
+; LA64-WITHFP-NEXT: ld.d $fp, $sp, 32 # 8-byte Folded Reload
+; LA64-WITHFP-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
+; LA64-WITHFP-NEXT: addi.d $sp, $sp, 112
; LA64-WITHFP-NEXT: ret
%va = alloca ptr, align 8
call void @llvm.va_start(ptr %va)
@@ -314,10 +314,10 @@ define void @va_aligned_stack_caller() nounwind {
;
; LA64-WITHFP-LABEL: va_aligned_stack_caller:
; LA64-WITHFP: # %bb.0:
-; LA64-WITHFP-NEXT: addi.d $sp, $sp, -112
-; LA64-WITHFP-NEXT: st.d $ra, $sp, 104 # 8-byte Folded Spill
-; LA64-WITHFP-NEXT: st.d $fp, $sp, 96 # 8-byte Folded Spill
-; LA64-WITHFP-NEXT: addi.d $fp, $sp, 112
+; LA64-WITHFP-NEXT: addi.d $sp, $sp, -128
+; LA64-WITHFP-NEXT: st.d $ra, $sp, 120 # 8-byte Folded Spill
+; LA64-WITHFP-NEXT: st.d $fp, $sp, 112 # 8-byte Folded Spill
+; LA64-WITHFP-NEXT: addi.d $fp, $sp, 128
; LA64-WITHFP-NEXT: ori $a0, $zero, 17
; LA64-WITHFP-NEXT: st.d $a0, $sp, 48
; LA64-WITHFP-NEXT: ori $a0, $zero, 16
@@ -336,23 +336,23 @@ define void @va_aligned_stack_caller() nounwind {
; LA64-WITHFP-NEXT: lu32i.d $a0, 335544
; LA64-WITHFP-NEXT: lu52i.d $a0, $a0, -328
; LA64-WITHFP-NEXT: st.d $a0, $sp, 16
-; LA64-WITHFP-NEXT: st.d $zero, $fp, -24
+; LA64-WITHFP-NEXT: st.d $zero, $fp, -40
; LA64-WITHFP-NEXT: vrepli.b $vr0, 0
-; LA64-WITHFP-NEXT: vst $vr0, $fp, -40
+; LA64-WITHFP-NEXT: vst $vr0, $fp, -56
; LA64-WITHFP-NEXT: ori $a5, $zero, 1000
; LA64-WITHFP-NEXT: ori $a0, $zero, 1
; LA64-WITHFP-NEXT: ori $a1, $zero, 11
-; LA64-WITHFP-NEXT: addi.d $a2, $fp, -48
+; LA64-WITHFP-NEXT: addi.d $a2, $fp, -64
; LA64-WITHFP-NEXT: ori $a3, $zero, 12
; LA64-WITHFP-NEXT: ori $a4, $zero, 13
; LA64-WITHFP-NEXT: ori $a7, $zero, 1
-; LA64-WITHFP-NEXT: st.d $a5, $fp, -48
+; LA64-WITHFP-NEXT: st.d $a5, $fp, -64
; LA64-WITHFP-NEXT: move $a6, $zero
; LA64-WITHFP-NEXT: pcaddu18i $ra, %call36(va_aligned_stack_callee)
; LA64-WITHFP-NEXT: jirl $ra, $ra, 0
-; LA64-WITHFP-NEXT: ld.d $fp, $sp, 96 # 8-byte Folded Reload
-; LA64-WITHFP-NEXT: ld.d $ra, $sp, 104 # 8-byte Folded Reload
-; LA64-WITHFP-NEXT: addi.d $sp, $sp, 112
+; LA64-WITHFP-NEXT: ld.d $fp, $sp, 112 # 8-byte Folded Reload
+; LA64-WITHFP-NEXT: ld.d $ra, $sp, 120 # 8-byte Folded Reload
+; LA64-WITHFP-NEXT: addi.d $sp, $sp, 128
; LA64-WITHFP-NEXT: ret
%1 = call i32 (i32, ...) @va_aligned_stack_callee(i32 1, i32 11,
i256 1000, i32 12, i32 13, i128 18446744073709551616, i32 14,
>From abbc01370de644d355a0e3ed15ab3aa14668fb97 Mon Sep 17 00:00:00 2001
From: tangaac <tangyan01 at loongson.cn>
Date: Tue, 15 Jul 2025 16:46:29 +0800
Subject: [PATCH 2/3] add and update tests
---
.../insert-extract-pair-elements.ll | 40 ++---
llvm/test/CodeGen/LoongArch/llvm.sincos.ll | 150 ++++++++--------
llvm/test/CodeGen/LoongArch/lsx/pr146455.ll | 163 ++++++++++++++++++
3 files changed, 258 insertions(+), 95 deletions(-)
create mode 100644 llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-pair-elements.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-pair-elements.ll
index 88c3e4367ffa7..f2d8dda1850b1 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-pair-elements.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-pair-elements.ll
@@ -4,23 +4,23 @@
define <32 x i8> @insert_extract_v32i8(<32 x i8> %a) nounwind {
; CHECK-LABEL: insert_extract_v32i8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: vpickve2gr.b $a0, $vr0, 15
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: ld.b $a1, $sp, 31
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: ld.b $a1, $sp, 63
; CHECK-NEXT: vinsgr2vr.b $vr0, $a0, 1
; CHECK-NEXT: xvori.b $xr1, $xr0, 0
; CHECK-NEXT: xvpermi.q $xr1, $xr0, 1
; CHECK-NEXT: vinsgr2vr.b $vr1, $a1, 1
; CHECK-NEXT: xvpermi.q $xr0, $xr1, 2
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
entry:
%b_lo = extractelement <32 x i8> %a, i32 15
@@ -33,23 +33,23 @@ entry:
define <16 x i16> @insert_extract_v16i16(<16 x i16> %a) nounwind {
; CHECK-LABEL: insert_extract_v16i16:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi.d $sp, $sp, -64
-; CHECK-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; CHECK-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
-; CHECK-NEXT: addi.d $fp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $sp, -96
+; CHECK-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $fp, $sp, 96
; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 7
-; CHECK-NEXT: xvst $xr0, $sp, 0
-; CHECK-NEXT: ld.h $a1, $sp, 30
+; CHECK-NEXT: xvst $xr0, $sp, 32
+; CHECK-NEXT: ld.h $a1, $sp, 62
; CHECK-NEXT: vinsgr2vr.h $vr0, $a0, 1
; CHECK-NEXT: xvori.b $xr1, $xr0, 0
; CHECK-NEXT: xvpermi.q $xr1, $xr0, 1
; CHECK-NEXT: vinsgr2vr.h $vr1, $a1, 1
; CHECK-NEXT: xvpermi.q $xr0, $xr1, 2
-; CHECK-NEXT: addi.d $sp, $fp, -64
-; CHECK-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
-; CHECK-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; CHECK-NEXT: addi.d $sp, $sp, 64
+; CHECK-NEXT: addi.d $sp, $fp, -96
+; CHECK-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 96
; CHECK-NEXT: ret
entry:
%b_lo = extractelement <16 x i16> %a, i32 7
diff --git a/llvm/test/CodeGen/LoongArch/llvm.sincos.ll b/llvm/test/CodeGen/LoongArch/llvm.sincos.ll
index ffedd7f9e9438..648c19d509715 100644
--- a/llvm/test/CodeGen/LoongArch/llvm.sincos.ll
+++ b/llvm/test/CodeGen/LoongArch/llvm.sincos.ll
@@ -347,42 +347,42 @@ define { <2 x float>, <2 x float> } @test_sincos_v2f32(<2 x float> %a) #0 {
;
; LA64-LABEL: test_sincos_v2f32:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -64
-; LA64-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -80
+; LA64-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: vreplvei.w $vr0, $vr0, 0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
-; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: vpackev.w $vr0, $vr0, $vr1
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vpackev.w $vr1, $vr0, $vr1
-; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 64
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 80
; LA64-NEXT: ret
%result = call { <2 x float>, <2 x float> } @llvm.sincos.v2f32(<2 x float> %a)
ret { <2 x float>, <2 x float> } %result
@@ -439,48 +439,48 @@ define { <3 x float>, <3 x float> } @test_sincos_v3f32(<3 x float> %a) #0 {
;
; LA64-LABEL: test_sincos_v3f32:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -96
-; LA64-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -112
+; LA64-NEXT: st.d $ra, $sp, 104 # 8-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
; LA64-NEXT: vreplvei.w $vr0, $vr0, 2
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fst.s $fa0, $sp, 72
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: fst.s $fa0, $sp, 88
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
-; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fst.s $fa0, $sp, 68
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: fst.s $fa0, $sp, 84
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vreplvei.w $vr0, $vr0, 0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fst.s $fa0, $sp, 64
-; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
+; LA64-NEXT: fst.s $fa0, $sp, 80
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fst.s $fa0, $sp, 56
-; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
+; LA64-NEXT: fst.s $fa0, $sp, 72
+; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fst.s $fa0, $sp, 52
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: fst.s $fa0, $sp, 68
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fst.s $fa0, $sp, 48
-; LA64-NEXT: vld $vr0, $sp, 64
-; LA64-NEXT: vld $vr1, $sp, 48
-; LA64-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 96
+; LA64-NEXT: fst.s $fa0, $sp, 64
+; LA64-NEXT: vld $vr0, $sp, 80
+; LA64-NEXT: vld $vr1, $sp, 64
+; LA64-NEXT: ld.d $ra, $sp, 104 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 112
; LA64-NEXT: ret
%result = call { <3 x float>, <3 x float> } @llvm.sincos.v3f32(<3 x float> %a)
ret { <3 x float>, <3 x float> } %result
@@ -568,44 +568,44 @@ define { <2 x double>, <2 x double> } @test_sincos_v2f64(<2 x double> %a) #0 {
;
; LA64-LABEL: test_sincos_v2f64:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -64
-; LA64-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
-; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
-; LA64-NEXT: vreplvei.d $vr0, $vr0, 0
+; LA64-NEXT: addi.d $sp, $sp, -80
+; LA64-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
+; LA64-NEXT: vreplvei.d $vr0, $vr0, 0
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sin)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: movfr2gr.d $a0, $fa0
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: vreplvei.d $vr0, $vr0, 1
-; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sin)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: movfr2gr.d $a0, $fa0
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 1
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cos)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: movfr2gr.d $a0, $fa0
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cos)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: movfr2gr.d $a0, $fa0
-; LA64-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: vinsgr2vr.d $vr1, $a0, 1
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 64
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 80
; LA64-NEXT: ret
%result = call { <2 x double>, <2 x double> } @llvm.sincos.v2f64(<2 x double> %a)
ret { <2 x double>, <2 x double> } %result
@@ -801,17 +801,17 @@ define { <2 x fp128>, <2 x fp128> } @test_sincos_v2f128(<2 x fp128> %a) #0 {
;
; LA64-LABEL: test_sincos_v2f128:
; LA64: # %bb.0:
-; LA64-NEXT: addi.d $sp, $sp, -80
-; LA64-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
-; LA64-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s0, $sp, 56 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s1, $sp, 48 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s2, $sp, 40 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s3, $sp, 32 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s4, $sp, 24 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s5, $sp, 16 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s6, $sp, 8 # 8-byte Folded Spill
-; LA64-NEXT: st.d $s7, $sp, 0 # 8-byte Folded Spill
+; LA64-NEXT: addi.d $sp, $sp, -96
+; LA64-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 80 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s0, $sp, 72 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s1, $sp, 64 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s2, $sp, 56 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s3, $sp, 48 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s4, $sp, 40 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s5, $sp, 32 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s6, $sp, 24 # 8-byte Folded Spill
+; LA64-NEXT: st.d $s7, $sp, 16 # 8-byte Folded Spill
; LA64-NEXT: ld.d $fp, $a1, 16
; LA64-NEXT: ld.d $s0, $a1, 24
; LA64-NEXT: ld.d $s1, $a1, 0
@@ -847,17 +847,17 @@ define { <2 x fp128>, <2 x fp128> } @test_sincos_v2f128(<2 x fp128> %a) #0 {
; LA64-NEXT: st.d $s6, $s3, 16
; LA64-NEXT: st.d $s5, $s3, 8
; LA64-NEXT: st.d $s4, $s3, 0
-; LA64-NEXT: ld.d $s7, $sp, 0 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s6, $sp, 8 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s5, $sp, 16 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s4, $sp, 24 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s3, $sp, 32 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s2, $sp, 40 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s1, $sp, 48 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $s0, $sp, 56 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
-; LA64-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
-; LA64-NEXT: addi.d $sp, $sp, 80
+; LA64-NEXT: ld.d $s7, $sp, 16 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s6, $sp, 24 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s5, $sp, 32 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s4, $sp, 40 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s3, $sp, 48 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s2, $sp, 56 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s1, $sp, 64 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $s0, $sp, 72 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $fp, $sp, 80 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 96
; LA64-NEXT: ret
%result = call { <2 x fp128>, <2 x fp128> } @llvm.sincos.v2f128(<2 x fp128> %a)
ret { <2 x fp128>, <2 x fp128> } %result
diff --git a/llvm/test/CodeGen/LoongArch/lsx/pr146455.ll b/llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
new file mode 100644
index 0000000000000..c762aec578bc8
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
@@ -0,0 +1,163 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch64 -mattr=+d -mattr=+lsx < %s | FileCheck %s
+
+define void @foo(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ptr %8, ptr %9, ptr %10, float %11, ptr %_QMmodule_ra_rrtmEabsa12, <8 x float> %12, <8 x float> %13, <8 x float> %14) {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %.lr.ph.preheader
+; CHECK-NEXT: addi.d $sp, $sp, -16
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs1, $sp, 0 # 8-byte Folded Spill
+; CHECK-NEXT: .cfi_offset 56, -8
+; CHECK-NEXT: .cfi_offset 57, -16
+; CHECK-NEXT: ld.d $t0, $sp, 40
+; CHECK-NEXT: ld.d $t1, $sp, 32
+; CHECK-NEXT: ld.d $t2, $sp, 24
+; CHECK-NEXT: ld.d $t3, $sp, 16
+; CHECK-NEXT: movgr2fr.w $fa2, $zero
+; CHECK-NEXT: fmul.s $fa0, $fa0, $fa2
+; CHECK-NEXT: lu12i.w $t4, 523264
+; CHECK-NEXT: vreplgr2vr.w $vr3, $t4
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_0)
+; CHECK-NEXT: vld $vr4, $t4, %pc_lo12(.LCPI0_0)
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_1)
+; CHECK-NEXT: vld $vr7, $t4, %pc_lo12(.LCPI0_1)
+; CHECK-NEXT: lu12i.w $t4, 260096
+; CHECK-NEXT: vreplgr2vr.w $vr8, $t4
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_2)
+; CHECK-NEXT: vld $vr9, $t4, %pc_lo12(.LCPI0_2)
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_3)
+; CHECK-NEXT: vld $vr10, $t4, %pc_lo12(.LCPI0_3)
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_4)
+; CHECK-NEXT: vld $vr11, $t4, %pc_lo12(.LCPI0_4)
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_6)
+; CHECK-NEXT: vld $vr12, $t4, %pc_lo12(.LCPI0_6)
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_5)
+; CHECK-NEXT: vld $vr13, $t4, %pc_lo12(.LCPI0_5)
+; CHECK-NEXT: vrepli.b $vr14, 0
+; CHECK-NEXT: vpackev.w $vr6, $vr8, $vr6
+; CHECK-NEXT: vshuf.w $vr12, $vr6, $vr14
+; CHECK-NEXT: .p2align 4, , 16
+; CHECK-NEXT: .LBB0_1: # %.lr.ph
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ld.d $t4, $t1, 0
+; CHECK-NEXT: ld.d $t5, $a6, 0
+; CHECK-NEXT: ld.d $t6, $t3, 0
+; CHECK-NEXT: vinsgr2vr.d $vr6, $t4, 0
+; CHECK-NEXT: vinsgr2vr.d $vr15, $t5, 0
+; CHECK-NEXT: vinsgr2vr.d $vr16, $t6, 0
+; CHECK-NEXT: ld.d $t4, $t2, 0
+; CHECK-NEXT: ld.d $t5, $a5, 0
+; CHECK-NEXT: ld.d $t6, $a2, 0
+; CHECK-NEXT: ld.d $t7, $a7, 0
+; CHECK-NEXT: vinsgr2vr.d $vr17, $t4, 0
+; CHECK-NEXT: vinsgr2vr.d $vr18, $t5, 0
+; CHECK-NEXT: vinsgr2vr.d $vr19, $t6, 0
+; CHECK-NEXT: vinsgr2vr.d $vr20, $t7, 0
+; CHECK-NEXT: ld.d $t4, $t0, 0
+; CHECK-NEXT: ld.d $t5, $a3, 0
+; CHECK-NEXT: ld.d $t6, $a4, 0
+; CHECK-NEXT: ld.d $t7, $a0, 0
+; CHECK-NEXT: vinsgr2vr.d $vr21, $t4, 0
+; CHECK-NEXT: vinsgr2vr.d $vr22, $t5, 0
+; CHECK-NEXT: vinsgr2vr.d $vr23, $t6, 0
+; CHECK-NEXT: vinsgr2vr.d $vr24, $t7, 0
+; CHECK-NEXT: vori.b $vr25, $vr4, 0
+; CHECK-NEXT: vshuf.w $vr25, $vr17, $vr6
+; CHECK-NEXT: vfadd.s $vr6, $vr25, $vr3
+; CHECK-NEXT: vori.b $vr17, $vr7, 0
+; CHECK-NEXT: vshuf.w $vr17, $vr2, $vr0
+; CHECK-NEXT: vfmul.s $vr17, $vr17, $vr1
+; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr17
+; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr14
+; CHECK-NEXT: vpackod.w $vr15, $vr18, $vr15
+; CHECK-NEXT: vori.b $vr17, $vr9, 0
+; CHECK-NEXT: vshuf.w $vr17, $vr15, $vr14
+; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr17
+; CHECK-NEXT: vpackev.w $vr15, $vr19, $vr16
+; CHECK-NEXT: vpackev.d $vr15, $vr21, $vr15
+; CHECK-NEXT: vori.b $vr16, $vr10, 0
+; CHECK-NEXT: vshuf.w $vr16, $vr15, $vr14
+; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr16
+; CHECK-NEXT: vori.b $vr15, $vr4, 0
+; CHECK-NEXT: vshuf.w $vr15, $vr22, $vr14
+; CHECK-NEXT: vori.b $vr16, $vr11, 0
+; CHECK-NEXT: vshuf.w $vr16, $vr24, $vr15
+; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr14
+; CHECK-NEXT: vfadd.s $vr15, $vr16, $vr3
+; CHECK-NEXT: vpackod.w $vr16, $vr20, $vr14
+; CHECK-NEXT: vori.b $vr17, $vr9, 0
+; CHECK-NEXT: vshuf.w $vr17, $vr16, $vr8
+; CHECK-NEXT: vori.b $vr16, $vr13, 0
+; CHECK-NEXT: vshuf.w $vr16, $vr17, $vr14
+; CHECK-NEXT: vori.b $vr17, $vr4, 0
+; CHECK-NEXT: vshuf.w $vr17, $vr23, $vr14
+; CHECK-NEXT: vori.b $vr18, $vr9, 0
+; CHECK-NEXT: vshuf.w $vr18, $vr17, $vr8
+; CHECK-NEXT: vfsub.s $vr17, $vr18, $vr12
+; CHECK-NEXT: vfsub.s $vr16, $vr16, $vr5
+; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr16
+; CHECK-NEXT: vfadd.s $vr15, $vr15, $vr17
+; CHECK-NEXT: vst $vr15, $a1, 16
+; CHECK-NEXT: vst $vr6, $a1, 0
+; CHECK-NEXT: b .LBB0_1
+.lr.ph.preheader:
+ br label %.lr.ph
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %15 = fmul float 0.000000e+00, %11
+ %16 = load <2 x float>, ptr %10, align 4
+ %17 = load <2 x float>, ptr %6, align 4
+ %18 = load <2 x float>, ptr %8, align 4
+ %19 = load <2 x float>, ptr %9, align 4
+ %20 = load <2 x float>, ptr %5, align 4
+ %21 = load <2 x float>, ptr %2, align 4
+ %22 = load <2 x float>, ptr %7, align 4
+ %23 = load <2 x float>, ptr %_QMmodule_ra_rrtmEabsa12, align 4
+ %24 = load <2 x float>, ptr %3, align 4
+ %25 = load <2 x float>, ptr %4, align 4
+ %26 = load <2 x float>, ptr %0, align 4
+ %27 = shufflevector <8 x float> splat (float 0x7FF8000000000000), <8 x float> %13, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
+ %28 = shufflevector <8 x float> %27, <8 x float> %12, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %29 = fmul <8 x float> zeroinitializer, %28
+ %30 = shufflevector <2 x float> %16, <2 x float> %19, <8 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %31 = fadd <8 x float> %29, %30
+ %32 = insertelement <8 x float> zeroinitializer, float %15, i64 0
+ %33 = shufflevector <8 x float> %12, <8 x float> %13, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
+ %34 = shufflevector <8 x float> %33, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 poison>
+ %35 = shufflevector <8 x float> %34, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %36 = fmul <8 x float> %32, %35
+ %37 = fadd <8 x float> %31, %36
+ %38 = shufflevector <8 x float> zeroinitializer, <8 x float> splat (float 0x7FF8000000000000), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 9>
+ %39 = fadd <8 x float> %37, %38
+ %40 = shufflevector <2 x float> %17, <2 x float> %20, <8 x i32> <i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %41 = shufflevector <8 x float> %40, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %42 = fadd <8 x float> %39, %41
+ %43 = shufflevector <2 x float> %18, <2 x float> %21, <8 x i32> <i32 0, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %44 = shufflevector <2 x float> %23, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %45 = shufflevector <8 x float> %43, <8 x float> %44, <8 x i32> <i32 0, i32 1, i32 8, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %46 = shufflevector <8 x float> %45, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 poison, i32 poison, i32 poison, i32 poison>
+ %47 = shufflevector <8 x float> %46, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 poison, i32 poison, i32 poison>
+ %48 = shufflevector <2 x float> %24, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %49 = shufflevector <8 x float> %47, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
+ %50 = shufflevector <2 x float> %26, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %51 = shufflevector <8 x float> %49, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 poison>
+ %52 = shufflevector <8 x float> %51, <8 x float> splat (float 0x7FF8000000000000), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %53 = fadd <8 x float> %42, %52
+ %54 = shufflevector <8 x float> zeroinitializer, <8 x float> %48, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 poison, i32 poison>
+ %55 = shufflevector <8 x float> %54, <8 x float> %50, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
+ %56 = fadd <8 x float> %53, %55
+ %57 = shufflevector <2 x float> zeroinitializer, <2 x float> %22, <8 x i32> <i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %58 = shufflevector <8 x float> %57, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %59 = shufflevector <8 x float> %58, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 9, i32 poison, i32 poison, i32 poison, i32 poison>
+ %60 = shufflevector <8 x float> %59, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 poison, i32 poison, i32 poison>
+ %61 = shufflevector <2 x float> %25, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %62 = shufflevector <8 x float> %60, <8 x float> %61, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 poison, i32 poison>
+ %63 = shufflevector <8 x float> %62, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
+ %64 = shufflevector <8 x float> %14, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
+ %65 = shufflevector <8 x float> %64, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %66 = fsub <8 x float> %63, %65
+ %67 = fadd <8 x float> %56, %66
+ store <8 x float> %67, ptr %1, align 4
+ br label %.lr.ph
+}
>From dcf8105c1f65cf8ab0145c327d3cec50bcf62aaa Mon Sep 17 00:00:00 2001
From: tangaac <tangyan01 at loongson.cn>
Date: Wed, 16 Jul 2025 13:57:59 +0800
Subject: [PATCH 3/3] update test
---
llvm/test/CodeGen/LoongArch/lasx/pr146455.ll | 437 +++++++++++++++++++
llvm/test/CodeGen/LoongArch/lsx/pr146455.ll | 163 -------
2 files changed, 437 insertions(+), 163 deletions(-)
create mode 100644 llvm/test/CodeGen/LoongArch/lasx/pr146455.ll
delete mode 100644 llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
diff --git a/llvm/test/CodeGen/LoongArch/lasx/pr146455.ll b/llvm/test/CodeGen/LoongArch/lasx/pr146455.ll
new file mode 100644
index 0000000000000..fb450cf867d6c
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/pr146455.ll
@@ -0,0 +1,437 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch64 -mattr=+d -mattr=+lasx < %s | FileCheck %s
+
+define void @foo(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ptr %8, ptr %9, ptr %10, float %11, ptr %_QMmodule_ra_rrtmEabsa12, <8 x float> %12, <8 x float> %13, <8 x float> %14) {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %.lr.ph.preheader
+; CHECK-NEXT: addi.d $sp, $sp, -736
+; CHECK-NEXT: .cfi_def_cfa_offset 736
+; CHECK-NEXT: st.d $ra, $sp, 728 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 720 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s0, $sp, 712 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s1, $sp, 704 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s2, $sp, 696 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s3, $sp, 688 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s4, $sp, 680 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s5, $sp, 672 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s6, $sp, 664 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s7, $sp, 656 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s8, $sp, 648 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs0, $sp, 640 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs1, $sp, 632 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs2, $sp, 624 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs3, $sp, 616 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs4, $sp, 608 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs5, $sp, 600 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs6, $sp, 592 # 8-byte Folded Spill
+; CHECK-NEXT: fst.d $fs7, $sp, 584 # 8-byte Folded Spill
+; CHECK-NEXT: .cfi_offset 1, -8
+; CHECK-NEXT: .cfi_offset 22, -16
+; CHECK-NEXT: .cfi_offset 23, -24
+; CHECK-NEXT: .cfi_offset 24, -32
+; CHECK-NEXT: .cfi_offset 25, -40
+; CHECK-NEXT: .cfi_offset 26, -48
+; CHECK-NEXT: .cfi_offset 27, -56
+; CHECK-NEXT: .cfi_offset 28, -64
+; CHECK-NEXT: .cfi_offset 29, -72
+; CHECK-NEXT: .cfi_offset 30, -80
+; CHECK-NEXT: .cfi_offset 31, -88
+; CHECK-NEXT: .cfi_offset 56, -96
+; CHECK-NEXT: .cfi_offset 57, -104
+; CHECK-NEXT: .cfi_offset 58, -112
+; CHECK-NEXT: .cfi_offset 59, -120
+; CHECK-NEXT: .cfi_offset 60, -128
+; CHECK-NEXT: .cfi_offset 61, -136
+; CHECK-NEXT: .cfi_offset 62, -144
+; CHECK-NEXT: .cfi_offset 63, -152
+; CHECK-NEXT: addi.d $fp, $sp, 736
+; CHECK-NEXT: .cfi_def_cfa 22, 0
+; CHECK-NEXT: bstrins.d $sp, $zero, 4, 0
+; CHECK-NEXT: ld.d $t0, $fp, 24
+; CHECK-NEXT: ld.d $t1, $fp, 16
+; CHECK-NEXT: ld.d $t2, $fp, 8
+; CHECK-NEXT: ld.d $t3, $fp, 0
+; CHECK-NEXT: movgr2fr.w $fa4, $zero
+; CHECK-NEXT: xvst $xr4, $sp, 288 # 32-byte Folded Spill
+; CHECK-NEXT: fmul.s $fa4, $fa0, $fa4
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_0)
+; CHECK-NEXT: xvld $xr0, $t4, %pc_lo12(.LCPI0_0)
+; CHECK-NEXT: xvst $xr0, $sp, 256 # 32-byte Folded Spill
+; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_1)
+; CHECK-NEXT: fld.s $fa5, $t4, %pc_lo12(.LCPI0_1)
+; CHECK-NEXT: xvst $xr2, $sp, 352 # 32-byte Folded Spill
+; CHECK-NEXT: xvpermi.d $xr2, $xr2, 68
+; CHECK-NEXT: xvrepl128vei.w $xr2, $xr2, 1
+; CHECK-NEXT: xvpickve2gr.w $t4, $xr1, 0
+; CHECK-NEXT: movgr2fr.w $fa0, $t4
+; CHECK-NEXT: xvpermi.d $xr2, $xr2, 68
+; CHECK-NEXT: xvst $xr2, $sp, 224 # 32-byte Folded Spill
+; CHECK-NEXT: movfr2gr.s $t4, $fa0
+; CHECK-NEXT: xvrepli.b $xr6, 0
+; CHECK-NEXT: pcalau12i $t5, %pc_hi20(.LCPI0_2)
+; CHECK-NEXT: xvld $xr0, $t5, %pc_lo12(.LCPI0_2)
+; CHECK-NEXT: xvst $xr0, $sp, 192 # 32-byte Folded Spill
+; CHECK-NEXT: xvpermi.d $xr0, $xr4, 68
+; CHECK-NEXT: xvst $xr0, $sp, 160 # 32-byte Folded Spill
+; CHECK-NEXT: pcalau12i $t5, %pc_hi20(.LCPI0_3)
+; CHECK-NEXT: xvld $xr0, $t5, %pc_lo12(.LCPI0_3)
+; CHECK-NEXT: xvst $xr0, $sp, 128 # 32-byte Folded Spill
+; CHECK-NEXT: xvpickve2gr.w $t5, $xr1, 1
+; CHECK-NEXT: movgr2fr.w $fa0, $t5
+; CHECK-NEXT: vinsgr2vr.w $vr4, $t4, 0
+; CHECK-NEXT: movfr2gr.s $t5, $fa0
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 2
+; CHECK-NEXT: movgr2fr.w $fa0, $t6
+; CHECK-NEXT: vinsgr2vr.w $vr4, $t5, 1
+; CHECK-NEXT: movfr2gr.s $t5, $fa0
+; CHECK-NEXT: pcalau12i $t6, %pc_hi20(.LCPI0_4)
+; CHECK-NEXT: fld.d $fa0, $t6, %pc_lo12(.LCPI0_4)
+; CHECK-NEXT: xvst $xr1, $sp, 320 # 32-byte Folded Spill
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 3
+; CHECK-NEXT: movgr2fr.w $fa2, $t6
+; CHECK-NEXT: vinsgr2vr.w $vr4, $t5, 2
+; CHECK-NEXT: movfr2gr.s $t5, $fa2
+; CHECK-NEXT: vinsgr2vr.w $vr4, $t5, 3
+; CHECK-NEXT: vst $vr4, $sp, 112 # 16-byte Folded Spill
+; CHECK-NEXT: movfr2gr.d $t5, $fa0
+; CHECK-NEXT: lu12i.w $t6, 260096
+; CHECK-NEXT: xvreplgr2vr.w $xr1, $t6
+; CHECK-NEXT: pcalau12i $t7, %pc_hi20(.LCPI0_5)
+; CHECK-NEXT: xvld $xr0, $t7, %pc_lo12(.LCPI0_5)
+; CHECK-NEXT: xvst $xr0, $sp, 64 # 32-byte Folded Spill
+; CHECK-NEXT: pcalau12i $t7, %pc_hi20(.LCPI0_6)
+; CHECK-NEXT: xvld $xr13, $t7, %pc_lo12(.LCPI0_6)
+; CHECK-NEXT: pcalau12i $t7, %pc_hi20(.LCPI0_7)
+; CHECK-NEXT: xvld $xr0, $t7, %pc_lo12(.LCPI0_7)
+; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
+; CHECK-NEXT: pcalau12i $t7, %pc_hi20(.LCPI0_8)
+; CHECK-NEXT: xvld $xr15, $t7, %pc_lo12(.LCPI0_8)
+; CHECK-NEXT: pcalau12i $t7, %pc_hi20(.LCPI0_9)
+; CHECK-NEXT: xvld $xr16, $t7, %pc_lo12(.LCPI0_9)
+; CHECK-NEXT: xvori.b $xr12, $xr5, 0
+; CHECK-NEXT: movfr2gr.s $t7, $fa5
+; CHECK-NEXT: pcalau12i $t8, %pc_hi20(.LCPI0_10)
+; CHECK-NEXT: xvld $xr5, $t8, %pc_lo12(.LCPI0_10)
+; CHECK-NEXT: pcalau12i $t8, %pc_hi20(.LCPI0_11)
+; CHECK-NEXT: xvld $xr18, $t8, %pc_lo12(.LCPI0_11)
+; CHECK-NEXT: xvpickve2gr.w $t8, $xr3, 0
+; CHECK-NEXT: movgr2fr.w $fa2, $t8
+; CHECK-NEXT: xvpickve2gr.w $t8, $xr3, 1
+; CHECK-NEXT: movgr2fr.w $fa0, $t8
+; CHECK-NEXT: movfr2gr.s $t8, $fa2
+; CHECK-NEXT: vinsgr2vr.w $vr19, $t8, 0
+; CHECK-NEXT: movfr2gr.s $t8, $fa0
+; CHECK-NEXT: vinsgr2vr.w $vr19, $t8, 1
+; CHECK-NEXT: xvpickve2gr.w $t8, $xr3, 2
+; CHECK-NEXT: movgr2fr.w $fa2, $t8
+; CHECK-NEXT: xvori.b $xr11, $xr3, 0
+; CHECK-NEXT: xvpickve2gr.w $t8, $xr3, 3
+; CHECK-NEXT: movgr2fr.w $fa3, $t8
+; CHECK-NEXT: pcalau12i $t8, %pc_hi20(.LCPI0_12)
+; CHECK-NEXT: xvld $xr20, $t8, %pc_lo12(.LCPI0_12)
+; CHECK-NEXT: movfr2gr.s $t8, $fa2
+; CHECK-NEXT: xvori.b $xr14, $xr6, 0
+; CHECK-NEXT: xvpermi.d $xr21, $xr6, 68
+; CHECK-NEXT: xvpermi.d $xr22, $xr1, 68
+; CHECK-NEXT: vinsgr2vr.w $vr19, $t8, 2
+; CHECK-NEXT: movfr2gr.s $t8, $fa3
+; CHECK-NEXT: vldi $vr23, -1168
+; CHECK-NEXT: vinsgr2vr.w $vr19, $t8, 3
+; CHECK-NEXT: .p2align 4, , 16
+; CHECK-NEXT: .LBB0_1: # %.lr.ph
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ld.d $s8, $t1, 0
+; CHECK-NEXT: ld.d $s1, $a6, 0
+; CHECK-NEXT: ld.d $s5, $t3, 0
+; CHECK-NEXT: ld.d $ra, $t2, 0
+; CHECK-NEXT: ld.d $s2, $a5, 0
+; CHECK-NEXT: ld.d $s7, $a2, 0
+; CHECK-NEXT: ld.d $s0, $a7, 0
+; CHECK-NEXT: ld.d $s6, $t0, 0
+; CHECK-NEXT: ld.d $s3, $a3, 0
+; CHECK-NEXT: ld.d $t8, $a4, 0
+; CHECK-NEXT: xvpermi.d $xr24, $xr12, 68
+; CHECK-NEXT: xvld $xr1, $sp, 256 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr0, $sp, 224 # 32-byte Folded Reload
+; CHECK-NEXT: xvshuf.w $xr1, $xr0, $xr24
+; CHECK-NEXT: xvpickve2gr.w $s4, $xr1, 0
+; CHECK-NEXT: movgr2fr.w $fa2, $s4
+; CHECK-NEXT: ld.d $s4, $a0, 0
+; CHECK-NEXT: movfr2gr.s $t6, $fa2
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 0
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 1
+; CHECK-NEXT: movgr2fr.w $fa2, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 2
+; CHECK-NEXT: movgr2fr.w $fa3, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa2
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 1
+; CHECK-NEXT: movfr2gr.s $t6, $fa3
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 2
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 3
+; CHECK-NEXT: movgr2fr.w $fa2, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 4
+; CHECK-NEXT: movgr2fr.w $fa3, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa2
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 3
+; CHECK-NEXT: movfr2gr.s $t6, $fa3
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 4
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 5
+; CHECK-NEXT: movgr2fr.w $fa2, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr1, 6
+; CHECK-NEXT: movgr2fr.w $fa1, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa2
+; CHECK-NEXT: xvld $xr0, $sp, 352 # 32-byte Folded Reload
+; CHECK-NEXT: st.d $a1, $sp, 0 # 8-byte Folded Spill
+; CHECK-NEXT: addi.d $a1, $sp, 564
+; CHECK-NEXT: xvstelm.w $xr0, $a1, 0, 0
+; CHECK-NEXT: xvld $xr0, $sp, 320 # 32-byte Folded Reload
+; CHECK-NEXT: addi.d $a1, $sp, 560
+; CHECK-NEXT: xvstelm.w $xr0, $a1, 0, 4
+; CHECK-NEXT: ld.d $a1, $sp, 0 # 8-byte Folded Reload
+; CHECK-NEXT: vld $vr0, $sp, 112 # 16-byte Folded Reload
+; CHECK-NEXT: vst $vr0, $sp, 544
+; CHECK-NEXT: xvld $xr2, $sp, 544
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 5
+; CHECK-NEXT: movfr2gr.s $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t6, 6
+; CHECK-NEXT: xvinsgr2vr.d $xr27, $s8, 0
+; CHECK-NEXT: xvpickve2gr.d $t6, $xr2, 0
+; CHECK-NEXT: movgr2fr.d $fa1, $t6
+; CHECK-NEXT: xvinsgr2vr.d $xr28, $ra, 0
+; CHECK-NEXT: movfr2gr.d $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.d $xr26, $t6, 0
+; CHECK-NEXT: xvpickve2gr.d $t6, $xr2, 1
+; CHECK-NEXT: movgr2fr.d $fa1, $t6
+; CHECK-NEXT: xvpickve2gr.d $t6, $xr2, 2
+; CHECK-NEXT: movgr2fr.d $fa2, $t6
+; CHECK-NEXT: movfr2gr.d $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.d $xr26, $t6, 1
+; CHECK-NEXT: movfr2gr.d $t6, $fa2
+; CHECK-NEXT: xvinsgr2vr.d $xr26, $t6, 2
+; CHECK-NEXT: xvinsgr2vr.d $xr1, $s5, 0
+; CHECK-NEXT: xvinsgr2vr.d $xr2, $s7, 0
+; CHECK-NEXT: xvinsgr2vr.d $xr3, $s6, 0
+; CHECK-NEXT: xvpermi.d $xr1, $xr1, 68
+; CHECK-NEXT: xvpermi.d $xr2, $xr2, 68
+; CHECK-NEXT: xvpackev.w $xr1, $xr2, $xr1
+; CHECK-NEXT: xvpermi.d $xr1, $xr1, 68
+; CHECK-NEXT: xvpermi.d $xr1, $xr1, 68
+; CHECK-NEXT: xvpermi.d $xr2, $xr3, 68
+; CHECK-NEXT: xvpermi.d $xr2, $xr2, 68
+; CHECK-NEXT: xvpackev.d $xr1, $xr2, $xr1
+; CHECK-NEXT: xvand.v $xr1, $xr1, $xr15
+; CHECK-NEXT: lu12i.w $t6, 260096
+; CHECK-NEXT: st.w $t6, $sp, 468
+; CHECK-NEXT: xvstelm.w $xr1, $sp, 464, 4
+; CHECK-NEXT: xvstelm.w $xr1, $sp, 460, 3
+; CHECK-NEXT: xvstelm.w $xr1, $sp, 456, 2
+; CHECK-NEXT: xvstelm.w $xr1, $sp, 452, 1
+; CHECK-NEXT: xvstelm.w $xr1, $sp, 448, 0
+; CHECK-NEXT: xvld $xr1, $sp, 448
+; CHECK-NEXT: xvinsgr2vr.d $xr30, $s1, 0
+; CHECK-NEXT: xvinsgr2vr.d $xr31, $s2, 0
+; CHECK-NEXT: xvinsgr2vr.d $xr17, $s3, 0
+; CHECK-NEXT: xvand.v $xr3, $xr1, $xr16
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 0
+; CHECK-NEXT: movgr2fr.w $fa1, $t6
+; CHECK-NEXT: xvld $xr0, $sp, 288 # 32-byte Folded Reload
+; CHECK-NEXT: xvpermi.d $xr4, $xr0, 68
+; CHECK-NEXT: xvinsgr2vr.d $xr2, $s4, 0
+; CHECK-NEXT: movfr2gr.s $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 0
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 1
+; CHECK-NEXT: movgr2fr.w $fa1, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 2
+; CHECK-NEXT: movgr2fr.w $fa0, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 1
+; CHECK-NEXT: movfr2gr.s $t6, $fa0
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 2
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 3
+; CHECK-NEXT: movgr2fr.w $fa0, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 4
+; CHECK-NEXT: movgr2fr.w $fa1, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa0
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 3
+; CHECK-NEXT: movfr2gr.s $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 4
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 5
+; CHECK-NEXT: movgr2fr.w $fa1, $t6
+; CHECK-NEXT: xvpermi.d $xr0, $xr17, 68
+; CHECK-NEXT: xvrepl128vei.w $xr0, $xr0, 1
+; CHECK-NEXT: xvpermi.d $xr0, $xr0, 68
+; CHECK-NEXT: xvori.b $xr17, $xr5, 0
+; CHECK-NEXT: xvshuf.w $xr17, $xr0, $xr4
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr17, 0
+; CHECK-NEXT: movgr2fr.w $fa0, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr17, 1
+; CHECK-NEXT: movgr2fr.w $fa6, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa0
+; CHECK-NEXT: vinsgr2vr.w $vr0, $t6, 0
+; CHECK-NEXT: movfr2gr.s $t6, $fa6
+; CHECK-NEXT: vinsgr2vr.w $vr0, $t6, 1
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr17, 2
+; CHECK-NEXT: movgr2fr.w $fa6, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr17, 3
+; CHECK-NEXT: movgr2fr.w $fa7, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa6
+; CHECK-NEXT: vinsgr2vr.w $vr0, $t6, 2
+; CHECK-NEXT: movfr2gr.s $t6, $fa7
+; CHECK-NEXT: vinsgr2vr.w $vr0, $t6, 3
+; CHECK-NEXT: xvinsgr2vr.d $xr6, $s0, 0
+; CHECK-NEXT: xvpermi.d $xr6, $xr6, 68
+; CHECK-NEXT: xvpackod.w $xr6, $xr6, $xr21
+; CHECK-NEXT: xvpermi.d $xr6, $xr6, 68
+; CHECK-NEXT: xvori.b $xr7, $xr18, 0
+; CHECK-NEXT: xvshuf.w $xr7, $xr22, $xr6
+; CHECK-NEXT: xvand.v $xr6, $xr7, $xr15
+; CHECK-NEXT: xvinsgr2vr.d $xr7, $t8, 0
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr6, 0
+; CHECK-NEXT: movgr2fr.w $ft1, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr6, 1
+; CHECK-NEXT: movgr2fr.w $ft0, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $ft1
+; CHECK-NEXT: vinsgr2vr.w $vr9, $t6, 0
+; CHECK-NEXT: movfr2gr.s $t6, $ft0
+; CHECK-NEXT: vinsgr2vr.w $vr9, $t6, 1
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr6, 2
+; CHECK-NEXT: movgr2fr.w $ft0, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr6, 3
+; CHECK-NEXT: movgr2fr.w $ft2, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $ft0
+; CHECK-NEXT: vinsgr2vr.w $vr9, $t6, 2
+; CHECK-NEXT: movfr2gr.s $t6, $ft2
+; CHECK-NEXT: vinsgr2vr.w $vr9, $t6, 3
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr3, 6
+; CHECK-NEXT: xvstelm.w $xr2, $sp, 504, 1
+; CHECK-NEXT: xvstelm.w $xr17, $sp, 500, 5
+; CHECK-NEXT: xvstelm.w $xr17, $sp, 496, 4
+; CHECK-NEXT: vst $vr0, $sp, 480
+; CHECK-NEXT: xvld $xr2, $sp, 480
+; CHECK-NEXT: xvstelm.w $xr7, $sp, 436, 1
+; CHECK-NEXT: xvstelm.w $xr6, $sp, 432, 4
+; CHECK-NEXT: vst $vr9, $sp, 416
+; CHECK-NEXT: xvld $xr0, $sp, 416
+; CHECK-NEXT: movgr2fr.w $fa3, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa1
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 5
+; CHECK-NEXT: movfr2gr.s $t6, $fa3
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t6, 6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr0, 0
+; CHECK-NEXT: movgr2fr.w $fa1, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr0, 1
+; CHECK-NEXT: movgr2fr.w $fa3, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa1
+; CHECK-NEXT: vinsgr2vr.w $vr1, $t6, 0
+; CHECK-NEXT: movfr2gr.s $t6, $fa3
+; CHECK-NEXT: vinsgr2vr.w $vr1, $t6, 1
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr0, 2
+; CHECK-NEXT: movgr2fr.w $fa3, $t6
+; CHECK-NEXT: xvpickve2gr.w $t6, $xr0, 3
+; CHECK-NEXT: movgr2fr.w $fa6, $t6
+; CHECK-NEXT: movfr2gr.s $t6, $fa3
+; CHECK-NEXT: vinsgr2vr.w $vr1, $t6, 2
+; CHECK-NEXT: movfr2gr.s $t6, $fa6
+; CHECK-NEXT: vinsgr2vr.w $vr1, $t6, 3
+; CHECK-NEXT: xvpermi.d $xr3, $xr27, 68
+; CHECK-NEXT: xvpermi.d $xr6, $xr28, 68
+; CHECK-NEXT: xvld $xr7, $sp, 192 # 32-byte Folded Reload
+; CHECK-NEXT: xvshuf.w $xr7, $xr6, $xr3
+; CHECK-NEXT: xvinsgr2vr.w $xr25, $t4, 7
+; CHECK-NEXT: xvfmul.s $xr3, $xr25, $xr14
+; CHECK-NEXT: xvfadd.s $xr3, $xr3, $xr7
+; CHECK-NEXT: xvori.b $xr6, $xr13, 0
+; CHECK-NEXT: xvshuf.w $xr6, $xr24, $xr4
+; CHECK-NEXT: xvld $xr7, $sp, 128 # 32-byte Folded Reload
+; CHECK-NEXT: xvld $xr8, $sp, 160 # 32-byte Folded Reload
+; CHECK-NEXT: xvshuf.w $xr7, $xr4, $xr8
+; CHECK-NEXT: xvinsgr2vr.d $xr26, $t5, 3
+; CHECK-NEXT: xvld $xr4, $sp, 64 # 32-byte Folded Reload
+; CHECK-NEXT: xvand.v $xr4, $xr26, $xr4
+; CHECK-NEXT: xvfmul.s $xr4, $xr7, $xr4
+; CHECK-NEXT: xvfadd.s $xr3, $xr3, $xr4
+; CHECK-NEXT: xvfadd.s $xr3, $xr3, $xr6
+; CHECK-NEXT: xvpermi.d $xr4, $xr30, 68
+; CHECK-NEXT: xvpermi.d $xr6, $xr31, 68
+; CHECK-NEXT: xvpackod.w $xr4, $xr6, $xr4
+; CHECK-NEXT: xvld $xr6, $sp, 32 # 32-byte Folded Reload
+; CHECK-NEXT: xvand.v $xr4, $xr4, $xr6
+; CHECK-NEXT: xvfadd.s $xr3, $xr3, $xr4
+; CHECK-NEXT: fst.s $ft15, $sp, 408
+; CHECK-NEXT: xvstelm.w $xr0, $sp, 404, 5
+; CHECK-NEXT: xvstelm.w $xr0, $sp, 400, 4
+; CHECK-NEXT: vst $vr1, $sp, 384
+; CHECK-NEXT: xvld $xr0, $sp, 384
+; CHECK-NEXT: addi.d $t6, $sp, 528
+; CHECK-NEXT: xvstelm.w $xr11, $t6, 0, 4
+; CHECK-NEXT: fst.s $ft15, $sp, 532
+; CHECK-NEXT: vst $vr19, $sp, 512
+; CHECK-NEXT: xvld $xr1, $sp, 512
+; CHECK-NEXT: xvinsgr2vr.w $xr29, $t7, 7
+; CHECK-NEXT: xvfadd.s $xr3, $xr3, $xr29
+; CHECK-NEXT: xvfadd.s $xr2, $xr3, $xr2
+; CHECK-NEXT: xvand.v $xr1, $xr1, $xr20
+; CHECK-NEXT: xvfsub.s $xr0, $xr0, $xr1
+; CHECK-NEXT: xvfadd.s $xr0, $xr2, $xr0
+; CHECK-NEXT: xvst $xr0, $a1, 0
+; CHECK-NEXT: b .LBB0_1
+.lr.ph.preheader:
+ br label %.lr.ph
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %15 = fmul float 0.000000e+00, %11
+ %16 = load <2 x float>, ptr %10, align 4
+ %17 = load <2 x float>, ptr %6, align 4
+ %18 = load <2 x float>, ptr %8, align 4
+ %19 = load <2 x float>, ptr %9, align 4
+ %20 = load <2 x float>, ptr %5, align 4
+ %21 = load <2 x float>, ptr %2, align 4
+ %22 = load <2 x float>, ptr %7, align 4
+ %23 = load <2 x float>, ptr %_QMmodule_ra_rrtmEabsa12, align 4
+ %24 = load <2 x float>, ptr %3, align 4
+ %25 = load <2 x float>, ptr %4, align 4
+ %26 = load <2 x float>, ptr %0, align 4
+ %27 = shufflevector <8 x float> splat (float 0x7FF8000000000000), <8 x float> %13, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
+ %28 = shufflevector <8 x float> %27, <8 x float> %12, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %29 = fmul <8 x float> zeroinitializer, %28
+ %30 = shufflevector <2 x float> %16, <2 x float> %19, <8 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %31 = fadd <8 x float> %29, %30
+ %32 = insertelement <8 x float> zeroinitializer, float %15, i64 0
+ %33 = shufflevector <8 x float> %12, <8 x float> %13, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
+ %34 = shufflevector <8 x float> %33, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 poison>
+ %35 = shufflevector <8 x float> %34, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %36 = fmul <8 x float> %32, %35
+ %37 = fadd <8 x float> %31, %36
+ %38 = shufflevector <8 x float> zeroinitializer, <8 x float> splat (float 0x7FF8000000000000), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 9>
+ %39 = fadd <8 x float> %37, %38
+ %40 = shufflevector <2 x float> %17, <2 x float> %20, <8 x i32> <i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %41 = shufflevector <8 x float> %40, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %42 = fadd <8 x float> %39, %41
+ %43 = shufflevector <2 x float> %18, <2 x float> %21, <8 x i32> <i32 0, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %44 = shufflevector <2 x float> %23, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %45 = shufflevector <8 x float> %43, <8 x float> %44, <8 x i32> <i32 0, i32 1, i32 8, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %46 = shufflevector <8 x float> %45, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 poison, i32 poison, i32 poison, i32 poison>
+ %47 = shufflevector <8 x float> %46, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 poison, i32 poison, i32 poison>
+ %48 = shufflevector <2 x float> %24, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %49 = shufflevector <8 x float> %47, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
+ %50 = shufflevector <2 x float> %26, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %51 = shufflevector <8 x float> %49, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 poison>
+ %52 = shufflevector <8 x float> %51, <8 x float> splat (float 0x7FF8000000000000), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %53 = fadd <8 x float> %42, %52
+ %54 = shufflevector <8 x float> zeroinitializer, <8 x float> %48, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 poison, i32 poison>
+ %55 = shufflevector <8 x float> %54, <8 x float> %50, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
+ %56 = fadd <8 x float> %53, %55
+ %57 = shufflevector <2 x float> zeroinitializer, <2 x float> %22, <8 x i32> <i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %58 = shufflevector <8 x float> %57, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %59 = shufflevector <8 x float> %58, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 9, i32 poison, i32 poison, i32 poison, i32 poison>
+ %60 = shufflevector <8 x float> %59, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 poison, i32 poison, i32 poison>
+ %61 = shufflevector <2 x float> %25, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %62 = shufflevector <8 x float> %60, <8 x float> %61, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 poison, i32 poison>
+ %63 = shufflevector <8 x float> %62, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
+ %64 = shufflevector <8 x float> %14, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
+ %65 = shufflevector <8 x float> %64, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+ %66 = fsub <8 x float> %63, %65
+ %67 = fadd <8 x float> %56, %66
+ store <8 x float> %67, ptr %1, align 4
+ br label %.lr.ph
+}
diff --git a/llvm/test/CodeGen/LoongArch/lsx/pr146455.ll b/llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
deleted file mode 100644
index c762aec578bc8..0000000000000
--- a/llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
+++ /dev/null
@@ -1,163 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc --mtriple=loongarch64 -mattr=+d -mattr=+lsx < %s | FileCheck %s
-
-define void @foo(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ptr %8, ptr %9, ptr %10, float %11, ptr %_QMmodule_ra_rrtmEabsa12, <8 x float> %12, <8 x float> %13, <8 x float> %14) {
-; CHECK-LABEL: foo:
-; CHECK: # %bb.0: # %.lr.ph.preheader
-; CHECK-NEXT: addi.d $sp, $sp, -16
-; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
-; CHECK-NEXT: fst.d $fs1, $sp, 0 # 8-byte Folded Spill
-; CHECK-NEXT: .cfi_offset 56, -8
-; CHECK-NEXT: .cfi_offset 57, -16
-; CHECK-NEXT: ld.d $t0, $sp, 40
-; CHECK-NEXT: ld.d $t1, $sp, 32
-; CHECK-NEXT: ld.d $t2, $sp, 24
-; CHECK-NEXT: ld.d $t3, $sp, 16
-; CHECK-NEXT: movgr2fr.w $fa2, $zero
-; CHECK-NEXT: fmul.s $fa0, $fa0, $fa2
-; CHECK-NEXT: lu12i.w $t4, 523264
-; CHECK-NEXT: vreplgr2vr.w $vr3, $t4
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_0)
-; CHECK-NEXT: vld $vr4, $t4, %pc_lo12(.LCPI0_0)
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_1)
-; CHECK-NEXT: vld $vr7, $t4, %pc_lo12(.LCPI0_1)
-; CHECK-NEXT: lu12i.w $t4, 260096
-; CHECK-NEXT: vreplgr2vr.w $vr8, $t4
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_2)
-; CHECK-NEXT: vld $vr9, $t4, %pc_lo12(.LCPI0_2)
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_3)
-; CHECK-NEXT: vld $vr10, $t4, %pc_lo12(.LCPI0_3)
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_4)
-; CHECK-NEXT: vld $vr11, $t4, %pc_lo12(.LCPI0_4)
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_6)
-; CHECK-NEXT: vld $vr12, $t4, %pc_lo12(.LCPI0_6)
-; CHECK-NEXT: pcalau12i $t4, %pc_hi20(.LCPI0_5)
-; CHECK-NEXT: vld $vr13, $t4, %pc_lo12(.LCPI0_5)
-; CHECK-NEXT: vrepli.b $vr14, 0
-; CHECK-NEXT: vpackev.w $vr6, $vr8, $vr6
-; CHECK-NEXT: vshuf.w $vr12, $vr6, $vr14
-; CHECK-NEXT: .p2align 4, , 16
-; CHECK-NEXT: .LBB0_1: # %.lr.ph
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: ld.d $t4, $t1, 0
-; CHECK-NEXT: ld.d $t5, $a6, 0
-; CHECK-NEXT: ld.d $t6, $t3, 0
-; CHECK-NEXT: vinsgr2vr.d $vr6, $t4, 0
-; CHECK-NEXT: vinsgr2vr.d $vr15, $t5, 0
-; CHECK-NEXT: vinsgr2vr.d $vr16, $t6, 0
-; CHECK-NEXT: ld.d $t4, $t2, 0
-; CHECK-NEXT: ld.d $t5, $a5, 0
-; CHECK-NEXT: ld.d $t6, $a2, 0
-; CHECK-NEXT: ld.d $t7, $a7, 0
-; CHECK-NEXT: vinsgr2vr.d $vr17, $t4, 0
-; CHECK-NEXT: vinsgr2vr.d $vr18, $t5, 0
-; CHECK-NEXT: vinsgr2vr.d $vr19, $t6, 0
-; CHECK-NEXT: vinsgr2vr.d $vr20, $t7, 0
-; CHECK-NEXT: ld.d $t4, $t0, 0
-; CHECK-NEXT: ld.d $t5, $a3, 0
-; CHECK-NEXT: ld.d $t6, $a4, 0
-; CHECK-NEXT: ld.d $t7, $a0, 0
-; CHECK-NEXT: vinsgr2vr.d $vr21, $t4, 0
-; CHECK-NEXT: vinsgr2vr.d $vr22, $t5, 0
-; CHECK-NEXT: vinsgr2vr.d $vr23, $t6, 0
-; CHECK-NEXT: vinsgr2vr.d $vr24, $t7, 0
-; CHECK-NEXT: vori.b $vr25, $vr4, 0
-; CHECK-NEXT: vshuf.w $vr25, $vr17, $vr6
-; CHECK-NEXT: vfadd.s $vr6, $vr25, $vr3
-; CHECK-NEXT: vori.b $vr17, $vr7, 0
-; CHECK-NEXT: vshuf.w $vr17, $vr2, $vr0
-; CHECK-NEXT: vfmul.s $vr17, $vr17, $vr1
-; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr17
-; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr14
-; CHECK-NEXT: vpackod.w $vr15, $vr18, $vr15
-; CHECK-NEXT: vori.b $vr17, $vr9, 0
-; CHECK-NEXT: vshuf.w $vr17, $vr15, $vr14
-; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr17
-; CHECK-NEXT: vpackev.w $vr15, $vr19, $vr16
-; CHECK-NEXT: vpackev.d $vr15, $vr21, $vr15
-; CHECK-NEXT: vori.b $vr16, $vr10, 0
-; CHECK-NEXT: vshuf.w $vr16, $vr15, $vr14
-; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr16
-; CHECK-NEXT: vori.b $vr15, $vr4, 0
-; CHECK-NEXT: vshuf.w $vr15, $vr22, $vr14
-; CHECK-NEXT: vori.b $vr16, $vr11, 0
-; CHECK-NEXT: vshuf.w $vr16, $vr24, $vr15
-; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr14
-; CHECK-NEXT: vfadd.s $vr15, $vr16, $vr3
-; CHECK-NEXT: vpackod.w $vr16, $vr20, $vr14
-; CHECK-NEXT: vori.b $vr17, $vr9, 0
-; CHECK-NEXT: vshuf.w $vr17, $vr16, $vr8
-; CHECK-NEXT: vori.b $vr16, $vr13, 0
-; CHECK-NEXT: vshuf.w $vr16, $vr17, $vr14
-; CHECK-NEXT: vori.b $vr17, $vr4, 0
-; CHECK-NEXT: vshuf.w $vr17, $vr23, $vr14
-; CHECK-NEXT: vori.b $vr18, $vr9, 0
-; CHECK-NEXT: vshuf.w $vr18, $vr17, $vr8
-; CHECK-NEXT: vfsub.s $vr17, $vr18, $vr12
-; CHECK-NEXT: vfsub.s $vr16, $vr16, $vr5
-; CHECK-NEXT: vfadd.s $vr6, $vr6, $vr16
-; CHECK-NEXT: vfadd.s $vr15, $vr15, $vr17
-; CHECK-NEXT: vst $vr15, $a1, 16
-; CHECK-NEXT: vst $vr6, $a1, 0
-; CHECK-NEXT: b .LBB0_1
-.lr.ph.preheader:
- br label %.lr.ph
-
-.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
- %15 = fmul float 0.000000e+00, %11
- %16 = load <2 x float>, ptr %10, align 4
- %17 = load <2 x float>, ptr %6, align 4
- %18 = load <2 x float>, ptr %8, align 4
- %19 = load <2 x float>, ptr %9, align 4
- %20 = load <2 x float>, ptr %5, align 4
- %21 = load <2 x float>, ptr %2, align 4
- %22 = load <2 x float>, ptr %7, align 4
- %23 = load <2 x float>, ptr %_QMmodule_ra_rrtmEabsa12, align 4
- %24 = load <2 x float>, ptr %3, align 4
- %25 = load <2 x float>, ptr %4, align 4
- %26 = load <2 x float>, ptr %0, align 4
- %27 = shufflevector <8 x float> splat (float 0x7FF8000000000000), <8 x float> %13, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
- %28 = shufflevector <8 x float> %27, <8 x float> %12, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
- %29 = fmul <8 x float> zeroinitializer, %28
- %30 = shufflevector <2 x float> %16, <2 x float> %19, <8 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %31 = fadd <8 x float> %29, %30
- %32 = insertelement <8 x float> zeroinitializer, float %15, i64 0
- %33 = shufflevector <8 x float> %12, <8 x float> %13, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
- %34 = shufflevector <8 x float> %33, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 poison>
- %35 = shufflevector <8 x float> %34, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
- %36 = fmul <8 x float> %32, %35
- %37 = fadd <8 x float> %31, %36
- %38 = shufflevector <8 x float> zeroinitializer, <8 x float> splat (float 0x7FF8000000000000), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 9>
- %39 = fadd <8 x float> %37, %38
- %40 = shufflevector <2 x float> %17, <2 x float> %20, <8 x i32> <i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %41 = shufflevector <8 x float> %40, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %42 = fadd <8 x float> %39, %41
- %43 = shufflevector <2 x float> %18, <2 x float> %21, <8 x i32> <i32 0, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %44 = shufflevector <2 x float> %23, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %45 = shufflevector <8 x float> %43, <8 x float> %44, <8 x i32> <i32 0, i32 1, i32 8, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %46 = shufflevector <8 x float> %45, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 poison, i32 poison, i32 poison, i32 poison>
- %47 = shufflevector <8 x float> %46, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 poison, i32 poison, i32 poison>
- %48 = shufflevector <2 x float> %24, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %49 = shufflevector <8 x float> %47, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
- %50 = shufflevector <2 x float> %26, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %51 = shufflevector <8 x float> %49, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 poison>
- %52 = shufflevector <8 x float> %51, <8 x float> splat (float 0x7FF8000000000000), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
- %53 = fadd <8 x float> %42, %52
- %54 = shufflevector <8 x float> zeroinitializer, <8 x float> %48, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 poison, i32 poison>
- %55 = shufflevector <8 x float> %54, <8 x float> %50, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
- %56 = fadd <8 x float> %53, %55
- %57 = shufflevector <2 x float> zeroinitializer, <2 x float> %22, <8 x i32> <i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %58 = shufflevector <8 x float> %57, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %59 = shufflevector <8 x float> %58, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 9, i32 poison, i32 poison, i32 poison, i32 poison>
- %60 = shufflevector <8 x float> %59, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 poison, i32 poison, i32 poison>
- %61 = shufflevector <2 x float> %25, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
- %62 = shufflevector <8 x float> %60, <8 x float> %61, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 poison, i32 poison>
- %63 = shufflevector <8 x float> %62, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 9, i32 poison>
- %64 = shufflevector <8 x float> %14, <8 x float> splat (float 1.000000e+00), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 poison, i32 poison>
- %65 = shufflevector <8 x float> %64, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
- %66 = fsub <8 x float> %63, %65
- %67 = fadd <8 x float> %56, %66
- store <8 x float> %67, ptr %1, align 4
- br label %.lr.ph
-}
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