[llvm] Adding abdu/abds to canCreateUndefOrPoison (PR #149017)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 16 00:19:10 PDT 2025
================
@@ -395,3 +395,51 @@ define i64 @freeze_array() {
%t1 = add i64 %v1, %v2
ret i64 %t1
}
+
+define i32 @freeze_abdu(i8 %x, i8 %y) {
+; CHECK-SD-LABEL: freeze_abdu:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: and w8, w0, #0xff
+; CHECK-SD-NEXT: sub w8, w8, w1, uxtb
+; CHECK-SD-NEXT: cmp w8, #0
+; CHECK-SD-NEXT: cneg w0, w8, mi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: freeze_abdu:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: and w8, w0, #0xff
+; CHECK-GI-NEXT: sub w8, w8, w1, uxtb
+; CHECK-GI-NEXT: cmp w8, #0
+; CHECK-GI-NEXT: cneg w0, w8, le
+; CHECK-GI-NEXT: ret
+ %a = zext i8 %x to i32
+ %b = zext i8 %y to i32
+ %d = sub i32 %a, %b
+ %t = call i32 @llvm.abs.i32(i32 %d, i1 false)
+ %f = freeze i32 %t
+ ret i32 %f
+}
----------------
RKSimon wrote:
This isn't testing anything yet - we need to use the aarch64 `@llvm.aarch64.neon.?abd.*` intrinsics directly to ensure we start from a ABDU/S node (look at arm64-vabs.ll for examples). We then need to prove that the freeze has been moved - something similar to what I've proposed for the AVG nodes here: https://github.com/llvm/llvm-project/pull/148191#discussion_r2204332512
https://github.com/llvm/llvm-project/pull/149017
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