[llvm] a87b839 - [RISCV] Simplify conversion from ISD::Constant to ISD::TargetConstant in SelectAddrRegRegScale. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-07-15T18:41:28-07:00
New Revision: a87b8398f9e94ea363c170625e015074fecfd318

URL: https://github.com/llvm/llvm-project/commit/a87b8398f9e94ea363c170625e015074fecfd318
DIFF: https://github.com/llvm/llvm-project/commit/a87b8398f9e94ea363c170625e015074fecfd318.diff

LOG: [RISCV] Simplify conversion from ISD::Constant to ISD::TargetConstant in SelectAddrRegRegScale. NFC

Directly copy the underlying ConstantInt instead of reconstructing it.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 26eb0714ab81f..c8add63a55c0a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3064,8 +3064,8 @@ bool RISCVDAGToDAGISel::SelectAddrRegRegScale(SDValue Addr,
         !isa<ConstantSDNode>(AddrB.getOperand(1)) &&
         isInt<12>(C1->getSExtValue())) {
       // (add (add (shl A C2) B) C1) -> (add (add B C1) (shl A C2))
-      SDValue C1Val =
-          CurDAG->getTargetConstant(C1->getZExtValue(), SDLoc(Addr), VT);
+      SDValue C1Val = CurDAG->getTargetConstant(*C1->getConstantIntValue(),
+                                                SDLoc(Addr), VT);
       Base = SDValue(CurDAG->getMachineNode(RISCV::ADDI, SDLoc(Addr), VT,
                                             AddrB.getOperand(1), C1Val),
                      0);