[llvm] d26106d - [AArch64] Set the cache line size to 64 for the V2 and V3. (#148213)

[via llvm-commits]

Author: Sjoerd Meijer
Date: 2025-07-15T14:59:18+01:00
New Revision: d26106dbf002d71915f2c8a78629111f6b540db3

URL: https://github.com/llvm/llvm-project/commit/d26106dbf002d71915f2c8a78629111f6b540db3
DIFF: https://github.com/llvm/llvm-project/commit/d26106dbf002d71915f2c8a78629111f6b540db3.diff

LOG: [AArch64] Set the cache line size to 64 for the V2 and V3. (#148213)

This sets the cache line size to 64 for the Neoverse V2 and V3. I've
tested this with loop-interchange: it doesn't result in extra
compile-times, but it does enable a lot more interchange.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64Subtarget.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
index 0956823346795..2409cc862f21c 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -270,6 +270,7 @@ void AArch64Subtarget::initializeProperties(bool HasMinSize) {
     break;
   case NeoverseV2:
   case NeoverseV3:
+    CacheLineSize = 64;
     EpilogueVectorizationMinVF = 8;
     MaxInterleaveFactor = 4;
     ScatterOverhead = 13;