[llvm] a40dc05 - [VPlan] Mark canonical IV and reduction phis as not writing memory (NFC).

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2025-07-15T11:08:54+01:00
New Revision: a40dc05898b58a0e9534d8fda3bc1b28c398347b

URL: https://github.com/llvm/llvm-project/commit/a40dc05898b58a0e9534d8fda3bc1b28c398347b
DIFF: https://github.com/llvm/llvm-project/commit/a40dc05898b58a0e9534d8fda3bc1b28c398347b.diff

LOG: [VPlan] Mark canonical IV and reduction phis as not writing memory (NFC).

Both recipes do not write to memory. Should be NFC at the moment, as
they cannot be removed currently due to being in a cycle.

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Removed: 
    


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diff  --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
index 7dd844aec1242..1664bcc3881aa 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -67,8 +67,10 @@ bool VPRecipeBase::mayWriteToMemory() const {
                 ->onlyReadsMemory();
   case VPWidenIntrinsicSC:
     return cast<VPWidenIntrinsicRecipe>(this)->mayWriteToMemory();
+  case VPCanonicalIVPHISC:
   case VPBranchOnMaskSC:
   case VPFirstOrderRecurrencePHISC:
+  case VPReductionPHISC:
   case VPScalarIVStepsSC:
   case VPPredInstPHISC:
     return false;