[llvm] [VPlan] Expand VPWidenPointerInductionRecipe into separate recipes (PR #148274)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 14 09:12:16 PDT 2025
================
@@ -854,6 +856,11 @@ Value *VPInstruction::generate(VPTransformState &State) {
Value *Addend = State.get(getOperand(1), VPLane(0));
return Builder.CreatePtrAdd(Ptr, Addend, Name, getGEPNoWrapFlags());
}
+ case VPInstruction::WidePtrAdd: {
+ Value *Ptr = State.get(getOperand(0), true);
+ Value *Addend = State.get(getOperand(1), vputils::onlyFirstLaneUsed(this));
----------------
lukel97 wrote:
Oddly enough, `vputils::onlyFirstLaneUsed` triggers on two test cases Transforms/LoopVectorize/AArch64/sve-widen-gep.ll and Transforms/LoopVectorize/X86/pr48340.ll.
In at least pr48340 it comes from an unrolled pointer induction where the second unrolled gep isn't used?
```
vector.body:
EMIT-SCALAR vp<%index> = phi [ ir<0>, ir-bb<vector.ph> ], [ vp<%index.next>, vector.body ]
EMIT-SCALAR vp<%pointer.phi> = phi [ ir<%p>, ir-bb<vector.ph> ], [ vp<%ptr.ind>, vector.body ]
EMIT vp<%2> = mul ir<4>, ir<3>
EMIT vp<%3> = broadcast vp<%2>
EMIT vp<%4> = step-vector i64
EMIT vp<%5> = add vp<%3>, vp<%4>
EMIT vp<%6> = mul vp<%5>, ir<1024>
EMIT vp<%vector.gep> = wide-ptradd vp<%pointer.phi>, vp<%6>
EMIT vp<%7> = mul ir<1024>, ir<16>
EMIT vp<%8> = mul ir<4>, ir<0>
EMIT vp<%9> = broadcast vp<%8>
EMIT vp<%10> = step-vector i64
EMIT vp<%11> = add vp<%9>, vp<%10>
EMIT vp<%12> = mul vp<%11>, ir<1024>
EMIT vp<%vector.gep>.1 = wide-ptradd vp<%pointer.phi>, vp<%12>
WIDEN ir<%v> = load vp<%vector.gep>
EMIT vp<%index.next> = add nuw vp<%index>, ir<16>
EMIT vp<%ptr.ind> = ptradd vp<%pointer.phi>, vp<%7>
EMIT branch-on-count vp<%index.next>, ir<%n.vec>
Successor(s): middle.block, vector.body
```
So `onlyFirstLaneUsed` returns true, and we need to continue to generate a scalar for it to avoid a (mild) regression:
```
-; CHECK-NEXT: [[VECTOR_GEP4:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], i64 0
+; CHECK-NEXT: [[VECTOR_GEP4:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 0, i64 1024, i64 2048, i64 3072>
```
https://github.com/llvm/llvm-project/pull/148274
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