[llvm] [AMDGPU] ISel & PEI for whole wave functions (PR #145858)

[Diana Picus via llvm-commits]

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@@ -1662,6 +1714,21 @@ void SIFrameLowering::determineCalleeSaves(MachineFunction &MF,
   if (MFI->isEntryFunction())
     return;
 
+  if (MFI->isWholeWaveFunction()) {
+    // In practice, all the VGPRs are WWM registers, and we will need to save at
+    // least their inactive lanes. Add them to WWMReservedRegs.
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rovka wrote:

For the purposes of prolog epilog insertion, yes, since we need to preserve all the inactive lanes.

https://github.com/llvm/llvm-project/pull/145858