[llvm] [AMDGPU] Ensure positive InstOffset for buffer operations (PR #145504)

[Jay Foad via llvm-commits]

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@@ -4464,12 +4464,13 @@ bool AMDGPUAsmParser::validateOffset(const MCInst &Inst,
     return validateSMEMOffset(Inst, Operands);
 
   const auto &Op = Inst.getOperand(OpNum);
+  // GFX12+ buffer ops: InstOffset is signed 24, but must be positive
   if (isGFX12Plus() &&
       (TSFlags & (SIInstrFlags::MUBUF | SIInstrFlags::MTBUF))) {
     const unsigned OffsetSize = 24;
-    if (!isIntN(OffsetSize, Op.getImm())) {
+    if (!isUIntN(OffsetSize - 1, Op.getImm())) {
       Error(getFlatOffsetLoc(Operands),
-            Twine("expected a ") + Twine(OffsetSize) + "-bit signed offset");
+            Twine("expected a ") + Twine(OffsetSize - 1) + "-bit non-negative offset for buffer ops");
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jayfoad wrote:

I think the error message "expected a 23-bit non-negative offset" is confusing.

Either we should describe it as a "23-bit unsigned offset".

Or we should have two separate checks with separate errors: "expected a 24-bit signed offset" and "expected a non-negative offset".

https://github.com/llvm/llvm-project/pull/145504