[llvm] [RISCV][FPEnv] Lowering of fpmode intrinsics (PR #148569)
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Sun Jul 13 23:34:41 PDT 2025
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git-clang-format --diff HEAD~1 HEAD --extensions cpp,h -- llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index 29261ccb3..18b28f552 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -497,12 +497,12 @@ inline static bool isValidRoundingMode(unsigned Mode) {
namespace RISCVExceptFlags {
enum ExceptionFlag {
- NX = 0x01, // Inexact
- UF = 0x02, // Underflow
- OF = 0x04, // Overflow
- DZ = 0x08, // Divide by zero
- NV = 0x10, // Invalid operation
- ALL = 0x1F // Mask for all accrued exception flags
+ NX = 0x01, // Inexact
+ UF = 0x02, // Underflow
+ OF = 0x04, // Overflow
+ DZ = 0x08, // Divide by zero
+ NV = 0x10, // Invalid operation
+ ALL = 0x1F // Mask for all accrued exception flags
};
}
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https://github.com/llvm/llvm-project/pull/148569
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