[llvm] [X86] `combinePMULH` - combine `mulhu` + `srl` (PR #132548)

Abhishek Kaushik via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 13 04:50:31 PDT 2025


================
@@ -54087,15 +54093,19 @@ static SDValue combinePMULH(SDValue Src, EVT VT, const SDLoc &DL,
                                 InVT.getSizeInBits() / 16);
     SDValue Res = DAG.getNode(ISD::MULHU, DL, BCVT, DAG.getBitcast(BCVT, LHS),
                               DAG.getBitcast(BCVT, RHS));
-    return DAG.getNode(ISD::TRUNCATE, DL, VT, DAG.getBitcast(InVT, Res));
+    Res = DAG.getNode(ISD::TRUNCATE, DL, VT, DAG.getBitcast(InVT, Res));
+    return DAG.getNode(ISD::SRL, DL, VT, Res,
+                       DAG.getConstant(AdditionalShift, DL, VT));
   }
 
   // Truncate back to source type.
   LHS = DAG.getNode(ISD::TRUNCATE, DL, VT, LHS);
   RHS = DAG.getNode(ISD::TRUNCATE, DL, VT, RHS);
 
   unsigned Opc = IsSigned ? ISD::MULHS : ISD::MULHU;
-  return DAG.getNode(Opc, DL, VT, LHS, RHS);
+  SDValue Res = DAG.getNode(Opc, DL, VT, LHS, RHS);
+  return DAG.getNode(ISD::SRL, DL, VT, Res,
+                     DAG.getConstant(AdditionalShift, DL, VT));
----------------
abhishek-kaushik22 wrote:

Using ISD::SRA gives wrong results

https://godbolt.org/z/3PYaPb1be

https://github.com/llvm/llvm-project/pull/132548


More information about the llvm-commits mailing list