[llvm] [AArch64][Machine-Combiner] Split loads into lanes of neon vectors into multiple vectors when possible (PR #142941)

[David Green via llvm-commits]

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@@ -7327,6 +7329,9 @@ bool AArch64InstrInfo::isThroughputPattern(unsigned Pattern) const {
   case AArch64MachineCombinerPattern::MULSUBv2i32_indexed_OP2:
   case AArch64MachineCombinerPattern::MULSUBv4i32_indexed_OP1:
   case AArch64MachineCombinerPattern::MULSUBv4i32_indexed_OP2:
+  case AArch64MachineCombinerPattern::GATHER_i32:
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davemgreen wrote:

Can we call them LANEWISEGATHER or GATHERLANE or something like that, to distinguish from the gather instructions that we have.

https://github.com/llvm/llvm-project/pull/142941