[llvm] [RISCV] Add ISel patterns for Xqciac QC_SHLADD instruction (PR #148256)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 11 22:11:40 PDT 2025
================
@@ -1359,6 +1359,12 @@ class SelectQCbi<CondCode Cond, DAGOperand InTyImm, Pseudo OpNode >
let Predicates = [HasVendorXqciac, IsRV32] in {
def : Pat<(XLenVT (add GPRNoX0:$rd, (mul GPRNoX0:$rs1, simm12:$imm12))),
(QC_MULIADD GPRNoX0:$rd, GPRNoX0:$rs1, simm12:$imm12)>;
+foreach i = 4-31 in {
----------------
topperc wrote:
You need to put the immleaf name in the output part of the pattern too
```
+def : Pat<(i32 (add GPRNoX0:$rs1, (shl GPRNoX0:$rs2, uimm5gt3:$imm))),
+ (QC_SHLADD GPRNoX0:$rs1, GPRNoX0:$rs2, uimm5gt3:$imm)>;
```
https://github.com/llvm/llvm-project/pull/148256
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