[llvm] [WebAssembly] Add patterns for relaxed madd (PR #147487)

[via llvm-commits]

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@@ -1542,6 +1542,13 @@ defm "" : SIMDMADD<F32x4, 0x105, 0x106, [HasRelaxedSIMD]>;
 defm "" : SIMDMADD<F64x2, 0x107, 0x108, [HasRelaxedSIMD]>;
 defm "" : SIMDMADD<F16x8, 0x14e, 0x14f, [HasFP16]>;
 
+def : Pat<(fadd_contract (v4f32 V128:$a), (fmul_contract (v4f32 V128:$b), (v4f32 V128:$c))),
+           (MADD_F32x4 V128:$a, V128:$b, V128:$c)>, Requires<[HasRelaxedSIMD]>;
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badumbatish wrote:

i tried it out but the tablegen gives an error on `cannot define dst`. I'm unsure if its the limit of tablegen or is there sth can be done.

I can add a pattern like this, which also resides in the multiclass
```diff
multiclass SIMDMADD<Vec vec, bits<32> simdopA, bits<32> simdopS, list<Predicate> reqs> {
  defm MADD_#vec :
    SIMD_I<(outs V128:$dst), (ins V128:$a, V128:$b, V128:$c), (outs), (ins),
           [(set (vec.vt V128:$dst), (int_wasm_relaxed_madd
             (vec.vt V128:$a), (vec.vt V128:$b), (vec.vt V128:$c)))],
           vec.prefix#".relaxed_madd\t$dst, $a, $b, $c",
           vec.prefix#".relaxed_madd", simdopA, reqs>;
  defm NMADD_#vec :
    SIMD_I<(outs V128:$dst), (ins V128:$a, V128:$b, V128:$c), (outs), (ins),
           [(set (vec.vt V128:$dst), (int_wasm_relaxed_nmadd
             (vec.vt V128:$a), (vec.vt V128:$b), (vec.vt V128:$c)))],
           vec.prefix#".relaxed_nmadd\t$dst, $a, $b, $c",
           vec.prefix#".relaxed_nmadd", simdopS, reqs>;

+  def : Pat<(fadd_contract (vec.vt V128:$a), (fmul_contract (vec.vt V128:$b), (vec.vt V128:$c))),
+            (!cast<Instruction>("MADD_"#vec) V128:$a, V128:$b, V128:$c)>, Requires<[HasRelaxedSIMD]>;

}
```


https://github.com/llvm/llvm-project/pull/147487