[llvm] AMDGPU: Fix assert when multi operands to update after folding imm (PR #148205)

Shilei Tian via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 11 12:38:04 PDT 2025


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@@ -0,0 +1,127 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn-amd-hsa -mcpu=gfx1031 -run-pass=si-fold-operands -o - %s | FileCheck %s
+--- |
+  %struct.bar = type { %struct.bar.0, %struct.bar.0, %struct.bar.0 }
+  %struct.bar.0 = type { %struct.blam }
+  %struct.blam = type { i32, i32, i32, i32 }
+
+  @global = external addrspace(3) global %struct.bar
+
+  define void @snork() {
+  bb:
+    %call = call float @llvm.amdgcn.rcp.f32(float 0.000000e+00)
+    %fmul = fmul ninf float %call, 0.000000e+00
+    %fptoui = fptoui float %fmul to i32
+    %zext = zext i32 %fptoui to i64
+    %mul = mul i64 2, %zext
+    %trunc = trunc i64 %mul to i32
+    %0 = insertelement <4 x i32> poison, i32 %trunc, i32 0
+    %1 = insertelement <4 x i32> %0, i32 0, i32 1
+    %2 = insertelement <4 x i32> %1, i32 0, i32 2
+    %3 = insertelement <4 x i32> %2, i32 %trunc, i32 3
+    store <4 x i32> %3, ptr addrspace(3) getelementptr inbounds nuw (i8, ptr addrspace(3) @global, i32 32), align 16
+    %load = load <4 x i32>, ptr addrspace(3) getelementptr inbounds nuw (i8, ptr addrspace(3) @global, i32 32), align 16
+    %extractelement = extractelement <4 x i32> %load, i64 0
+    %icmp = icmp ne i32 %extractelement, 0
+    %extractelement1 = extractelement <4 x i32> %load, i64 3
+    %icmp2 = icmp ne i32 %extractelement1, 0
+    %select = select i1 %icmp, i1 true, i1 %icmp2
+    %select.inv = xor i1 %select, true
+    br i1 %select.inv, label %bb3, label %bb5, !amdgpu.uniform !0
+
+  bb3:                                              ; preds = %bb
+    %and = and <4 x i32> %load, splat (i32 1)
+    br label %bb5, !amdgpu.uniform !0
+
+  bb5:                                              ; preds = %bb3, %bb
+    ret void
+  }
+
+  declare float @llvm.amdgcn.rcp.f32(float)
+
+  !0 = !{}
+...
+---
+name:            snork
+alignment:       1
+tracksRegLiveness: true
+noPhis:          false
+isSSA:           true
+noVRegs:         false
+hasFakeUses:     false
+registers:
----------------
shiltian wrote:

Almost all of these things can go

https://github.com/llvm/llvm-project/pull/148205


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