[llvm] [AMDGPU] Provide control over AGPR/VGPR MFMA form (PR #148079)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index 52c25c64f..e11561d94 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -29,11 +29,11 @@ enum { MAX_LANES = 64 };
 
 using namespace llvm;
 
-cl::opt<bool>
-    MFMAVGPRForm("amdgpu-mfma-vgpr-form", cl::Hidden,
-             cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If "
-                      "unspecified, default to compiler heuristics"),
-             cl::init(false));
+cl::opt<bool> MFMAVGPRForm(
+    "amdgpu-mfma-vgpr-form", cl::Hidden,
+    cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If "
+             "unspecified, default to compiler heuristics"),
+    cl::init(false));
 
 const GCNTargetMachine &getTM(const GCNSubtarget *STI) {
   const SITargetLowering *TLI = STI->getTargetLowering();

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https://github.com/llvm/llvm-project/pull/148079