[lldb] [llvm] [lldb] Support disassembling RISC-V proprietary instructions (PR #145793)

[Sam Elliott via llvm-commits]

lenary wrote:

> We don't have any big endian riscv ArchSpec entry today or I'd add a big endian riscv instruction decoding test too.

We're starting to get Big Endian support for RISC-V in LLVM, but I've asked that those patches wait until after the branch as there's a lot of work to make big-endian work, and it would be better if it all came in one release not slowly over several (especially as the big-endian ABI is not yet completed).

Once we get big-endian support, testing should be fairly easy, as risc-v instructions are always little-endian.

https://github.com/llvm/llvm-project/pull/145793