[llvm] [RISCV][VLOPT] Add support for vrgather (PR #148249)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 11 08:02:25 PDT 2025
================
@@ -747,6 +747,14 @@ getOperandLog2EEW(const MachineOperand &MO, const MachineRegisterInfo *MRI) {
return TwoTimes ? MILog2SEW + 1 : MILog2SEW;
}
+ // Vector Register Gather with 16-bit Index Elements Instruction
+ // Dest and source data EEW=SEW. Index vector EEW=16.
+ case RISCV::VRGATHEREI16_VV: {
+ if (MO.getOperandNo() == 2)
+ return 4;
+ return MILog2SEW;
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lukel97 wrote:
Can you add MIR tests for VRGATHEREI16_VV in vl-opt-op-info.mir?
https://github.com/llvm/llvm-project/pull/148249
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