[llvm] [CodeGen] Do not use subsituteRegister to update implicit def (PR #148068)

[Sander de Smalen via llvm-commits]

================
@@ -228,6 +228,24 @@ MachineInstr *TargetInstrInfo::commuteInstructionImpl(MachineInstr &MI,
     SubReg0 = SubReg1;
   }
 
+  // For a case like this:
+  //   %0.sub = INST %0.sub(tied), %1.sub, implicit-def %0
+  // we need to update the implicit-def after commuting to result in:
+  //   %1.sub = INST %1.sub(tied), %0.sub, implicit-def %1
+  SmallVector<unsigned> UpdateImplicitDefIdx;
+  if (HasDef && MI.hasImplicitDef() && MI.getOperand(0).getReg() != Reg0) {
+    const TargetRegisterInfo *TRI =
+        MI.getMF()->getSubtarget().getRegisterInfo();
+    Register OrigReg0 = MI.getOperand(0).getReg();
----------------
sdesmalen-arm wrote:

If you move this code block just after the definition of `bool Reg2IsRenamable`, then this variable can be removed and the code can be simplified to:

```
if (HasDef && MI.hasImplicitDef() && MI.getOperand(0).getReg() == Reg0) {
  const TargetRegisterInfo *TRI =
      MI.getMF()->getSubtarget().getRegisterInfo();
  for (auto [OpNo, MO] : llvm::enumerate(MI.implicit_operands())) {
    Register ImplReg = MO.getReg();
    if ((ImplReg.isVirtual() && ImplReg == Reg0) ||
        (ImplReg.isPhysical() && Reg0.isPhysical() &&
         TRI->isSubRegisterEq(ImplReg, Reg0)))
      UpdateImplicitDefIdx.push_back(OpNo + MI.getNumExplicitOperands());
  }
}
```

Which is probably also safer, since it checks that `MI.getOperand(0).getReg()` is explicitly equal to `Reg0`.

https://github.com/llvm/llvm-project/pull/148068