[llvm] [RISCV] Handle implicit defs when ensuring pseudo dominates in peephole (PR #148181)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 11 04:01:22 PDT 2025
================
@@ -521,16 +521,23 @@ bool RISCVVectorPeephole::convertToUnmasked(MachineInstr &MI) const {
/// Check if it's safe to move From down to To, checking that no physical
/// registers are clobbered.
static bool isSafeToMove(const MachineInstr &From, const MachineInstr &To) {
- assert(From.getParent() == To.getParent() && !From.hasImplicitDef());
- SmallVector<Register> PhysUses;
+ assert(From.getParent() == To.getParent());
+ SmallVector<Register> PhysUses, PhysDefs;
for (const MachineOperand &MO : From.all_uses())
if (MO.getReg().isPhysical())
PhysUses.push_back(MO.getReg());
+ for (const MachineOperand &MO : From.all_defs())
+ if (MO.getReg().isPhysical())
+ PhysDefs.push_back(MO.getReg());
bool SawStore = false;
- for (auto II = From.getIterator(); II != To.getIterator(); II++) {
+ for (auto II = std::next(From.getIterator()); II != To.getIterator(); II++) {
for (Register PhysReg : PhysUses)
if (II->definesRegister(PhysReg, nullptr))
return false;
+ for (Register PhysReg : PhysDefs)
+ if (II->definesRegister(PhysReg, nullptr) ||
+ II->readsRegister(PhysReg, nullptr))
----------------
wangpc-pp wrote:
Why is reading it also unsafe?
https://github.com/llvm/llvm-project/pull/148181
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