[llvm] [SelectionDAG] Peek through freeze to see XOR (PR #147821)

[Simon Pilgrim via llvm-commits]

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@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=X86ASM
+
+define i32 @sub_freeze(i32 %x, i32 %y) {
+; X86ASM-LABEL: sub_freeze:
+; X86ASM:       # %bb.0:
+; X86ASM-NEXT:    xorl %eax, %eax
+; X86ASM-NEXT:    retq
+  %a = udiv i32 %x, %y
+  %b = freeze i32 %a
+  %c = sub i32 %a, %b
+  ret i32 %c
+}
+
+define i32 @sub_freeze_2(i32 %x, i32 %y) {
+; X86ASM-LABEL: sub_freeze_2:
+; X86ASM:       # %bb.0:
+; X86ASM-NEXT:    xorl %eax, %eax
+; X86ASM-NEXT:    retq
+  %a = add nuw i32 %x, %y
+  %b = freeze i32 %a
+  %c = sub i32 %a, %b
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RKSimon wrote:

@nikic @topperc isn't the real problem that we've ended up with frozen and unfrozen versions of the same value? It looks like DAG is missing an equivalent of InstCombinerImpl::freezeOtherUses - WDYT?

https://github.com/llvm/llvm-project/pull/147821