[llvm] [AMDGPU] Allocate AVRegClass last (PR #146606)

[Jeffrey Byrnes via llvm-commits]

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@@ -109,6 +109,23 @@ class SIRegisterClass <string n, list<ValueType> rTypes, int Align, dag rList>
   let TSFlags{2} = HasVGPR;
   let TSFlags{3} = HasAGPR;
   let TSFlags{4} = HasSGPR;
+
+  // RA will use RegisterClass AllocationPriority amongst other info (e.g. ordering in the basic block) 
+  // to decide which registers to try to assign first. Usually, this RegisterClass priority is given
+  // very high priority, if not the highest priority, when considering which VirtReg to allocate next.
+  //
+  // We have 5 bits to assign AllocationPriorities to RegisterClasses. Generally, it is beneficial to 
+  // assign more constrained RegisterClasses first. As a result, we prioritize larger register classes
+  // over smaller register classes. 
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jrbyrnes wrote:

Right, "larger" in this context can be confusing.

I meant register classes that contains registers which hold more bits. For example, VReg_512 has 16 32bit vgprs, whereas VGPR_32 only has 1, so a VReg_512 is "larger".

https://github.com/llvm/llvm-project/pull/146606