[llvm] [x86] Synchronize fp128 and i128 ABI tests (nfc) (PR #147923)
Trevor Gross via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 10 02:10:55 PDT 2025
https://github.com/tgross35 created https://github.com/llvm/llvm-project/pull/147923
The ABI tests for fp128 covers a handful of things that the i128 test currently does not, including targets other than x86-64 Linux and some simpler argument cases. Update the i128 test to be consistent with fp128. All existing test function patterns still exist, though they all wind up renamed.
Additionally correct some `call` signatures in the fp128 test (not relevant for output).
>From c97ca8bb5e49467015a9ab14f8ddf7809cdf2c67 Mon Sep 17 00:00:00 2001
From: Trevor Gross <tmgross at umich.edu>
Date: Thu, 10 Jul 2025 04:52:39 -0400
Subject: [PATCH] [x86] Synchronize fp128 and i128 ABI tests (nfc)
The ABI tests for fp128 covers a handful of things that the i128 test
currently does not, including targets other than x86-64 Linux and some
simpler argument cases. Update the i128 test to be consistent with
fp128. All existing test function patterns still exist, though they all
wind up renamed.
Additionally correct some `call` signatures in the fp128 test (not
relevant for output).
---
llvm/test/CodeGen/X86/fp128-abi.ll | 10 +-
llvm/test/CodeGen/X86/i128-abi.ll | 721 +++++++++++++++++++++++++----
2 files changed, 648 insertions(+), 83 deletions(-)
diff --git a/llvm/test/CodeGen/X86/fp128-abi.ll b/llvm/test/CodeGen/X86/fp128-abi.ll
index 526ed7c72f73f..863ebfc3bd853 100644
--- a/llvm/test/CodeGen/X86/fp128-abi.ll
+++ b/llvm/test/CodeGen/X86/fp128-abi.ll
@@ -1,5 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; Consider keeping tests in sync with i128-abi.ll
+
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64
@@ -360,7 +362,7 @@ define void @call_first_arg(fp128 %x) nounwind {
; CHECK-MINGW-NEXT: callq first_arg
; CHECK-MINGW-NEXT: addq $56, %rsp
; CHECK-MINGW-NEXT: retq
- call i128 @first_arg(fp128 %x)
+ call fp128 @first_arg(fp128 %x)
ret void
}
@@ -452,7 +454,7 @@ define void @call_leading_args(fp128 %x) nounwind {
; CHECK-MINGW-NEXT: callq leading_args
; CHECK-MINGW-NEXT: addq $72, %rsp
; CHECK-MINGW-NEXT: retq
- call i128 @leading_args(i64 0, i64 0, i64 0, i64 0, fp128 %x)
+ call fp128 @leading_args(i64 0, i64 0, i64 0, i64 0, fp128 %x)
ret void
}
@@ -562,7 +564,7 @@ define void @call_many_leading_args(fp128 %x) nounwind {
; CHECK-MINGW-NEXT: callq many_leading_args
; CHECK-MINGW-NEXT: addq $88, %rsp
; CHECK-MINGW-NEXT: retq
- call i128 @many_leading_args(i64 0, i64 0, i64 0, i64 0, fp128 0xL0, fp128 %x)
+ call fp128 @many_leading_args(i64 0, i64 0, i64 0, i64 0, fp128 0xL0, fp128 %x)
ret void
}
@@ -654,6 +656,6 @@ define void @call_trailing_arg(fp128 %x) nounwind {
; CHECK-MINGW-NEXT: callq trailing_arg
; CHECK-MINGW-NEXT: addq $72, %rsp
; CHECK-MINGW-NEXT: retq
- call i128 @trailing_arg(i64 0, i64 0, i64 0, i64 0, fp128 %x)
+ call fp128 @trailing_arg(i64 0, i64 0, i64 0, i64 0, fp128 %x)
ret void
}
diff --git a/llvm/test/CodeGen/X86/i128-abi.ll b/llvm/test/CodeGen/X86/i128-abi.ll
index 264c546b4cae2..01e2c6dbad227 100644
--- a/llvm/test/CodeGen/X86/i128-abi.ll
+++ b/llvm/test/CodeGen/X86/i128-abi.ll
@@ -1,97 +1,660 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
-define i128 @in_reg(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i128 %a4) {
-; CHECK-LABEL: in_reg:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movq %r9, %rdx
-; CHECK-NEXT: movq %r8, %rax
-; CHECK-NEXT: retq
- ret i128 %a4
+; Consider keeping tests in sync with fp128-abi.ll
+
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
+; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64
+; RUN: llc < %s -mtriple=i686-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC32
+; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MINGW
+
+define i128 @return(ptr %p) {
+; CHECK-X64-LABEL: return:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: movq (%rdi), %rax
+; CHECK-X64-NEXT: movq 8(%rdi), %rdx
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: return:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: pushl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: pushl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
+; CHECK-X86-NEXT: .cfi_offset %esi, -12
+; CHECK-X86-NEXT: .cfi_offset %edi, -8
+; CHECK-X86-NEXT: movl 12(%esp), %eax
+; CHECK-X86-NEXT: movl 16(%esp), %ecx
+; CHECK-X86-NEXT: movl (%ecx), %edx
+; CHECK-X86-NEXT: movl 4(%ecx), %esi
+; CHECK-X86-NEXT: movl 8(%ecx), %edi
+; CHECK-X86-NEXT: movl 12(%ecx), %ecx
+; CHECK-X86-NEXT: movl %ecx, 12(%eax)
+; CHECK-X86-NEXT: movl %edi, 8(%eax)
+; CHECK-X86-NEXT: movl %esi, 4(%eax)
+; CHECK-X86-NEXT: movl %edx, (%eax)
+; CHECK-X86-NEXT: popl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: popl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
+; CHECK-X86-NEXT: retl $4
+;
+; CHECK-MSVC64-LABEL: return:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: movq (%rcx), %rax
+; CHECK-MSVC64-NEXT: movq 8(%rcx), %rdx
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: return:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %edi
+; CHECK-MSVC32-NEXT: pushl %esi
+; CHECK-MSVC32-NEXT: movl 12(%esp), %eax
+; CHECK-MSVC32-NEXT: movl 16(%esp), %ecx
+; CHECK-MSVC32-NEXT: movl (%ecx), %edx
+; CHECK-MSVC32-NEXT: movl 4(%ecx), %esi
+; CHECK-MSVC32-NEXT: movl 8(%ecx), %edi
+; CHECK-MSVC32-NEXT: movl 12(%ecx), %ecx
+; CHECK-MSVC32-NEXT: movl %ecx, 12(%eax)
+; CHECK-MSVC32-NEXT: movl %edi, 8(%eax)
+; CHECK-MSVC32-NEXT: movl %esi, 4(%eax)
+; CHECK-MSVC32-NEXT: movl %edx, (%eax)
+; CHECK-MSVC32-NEXT: popl %esi
+; CHECK-MSVC32-NEXT: popl %edi
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: return:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: movq (%rcx), %rax
+; CHECK-MINGW-NEXT: movq 8(%rcx), %rdx
+; CHECK-MINGW-NEXT: retq
+ %r = load i128, ptr %p
+ ret i128 %r
+}
+
+define i128 @first_arg(i128 %x) {
+; CHECK-X64-LABEL: first_arg:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: movq %rsi, %rdx
+; CHECK-X64-NEXT: movq %rdi, %rax
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: first_arg:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: pushl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: pushl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
+; CHECK-X86-NEXT: .cfi_offset %esi, -12
+; CHECK-X86-NEXT: .cfi_offset %edi, -8
+; CHECK-X86-NEXT: movl 12(%esp), %eax
+; CHECK-X86-NEXT: movl 16(%esp), %ecx
+; CHECK-X86-NEXT: movl 20(%esp), %edx
+; CHECK-X86-NEXT: movl 24(%esp), %esi
+; CHECK-X86-NEXT: movl 28(%esp), %edi
+; CHECK-X86-NEXT: movl %edi, 12(%eax)
+; CHECK-X86-NEXT: movl %esi, 8(%eax)
+; CHECK-X86-NEXT: movl %edx, 4(%eax)
+; CHECK-X86-NEXT: movl %ecx, (%eax)
+; CHECK-X86-NEXT: popl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: popl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
+; CHECK-X86-NEXT: retl $4
+;
+; CHECK-MSVC64-LABEL: first_arg:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: movq %rcx, %rax
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: first_arg:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %edi
+; CHECK-MSVC32-NEXT: pushl %esi
+; CHECK-MSVC32-NEXT: movl 12(%esp), %eax
+; CHECK-MSVC32-NEXT: movl 16(%esp), %ecx
+; CHECK-MSVC32-NEXT: movl 20(%esp), %edx
+; CHECK-MSVC32-NEXT: movl 24(%esp), %esi
+; CHECK-MSVC32-NEXT: movl 28(%esp), %edi
+; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
+; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
+; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
+; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
+; CHECK-MSVC32-NEXT: popl %esi
+; CHECK-MSVC32-NEXT: popl %edi
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: first_arg:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: movq %rcx, %rax
+; CHECK-MINGW-NEXT: retq
+ ret i128 %x
}
-define i128 @on_stack(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i128 %a5) {
-; CHECK-LABEL: on_stack:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movq 8(%rsp), %rax
-; CHECK-NEXT: movq 16(%rsp), %rdx
-; CHECK-NEXT: retq
- ret i128 %a5
+; Still passed in regs on x86-64
+define i128 @leading_args(i64 %_0, i64 %_1, i64 %_2, i64 %_3, i128 %x) {
+; CHECK-X64-LABEL: leading_args:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: movq %r9, %rdx
+; CHECK-X64-NEXT: movq %r8, %rax
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: leading_args:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: pushl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: pushl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
+; CHECK-X86-NEXT: .cfi_offset %esi, -12
+; CHECK-X86-NEXT: .cfi_offset %edi, -8
+; CHECK-X86-NEXT: movl 12(%esp), %eax
+; CHECK-X86-NEXT: movl 48(%esp), %ecx
+; CHECK-X86-NEXT: movl 52(%esp), %edx
+; CHECK-X86-NEXT: movl 56(%esp), %esi
+; CHECK-X86-NEXT: movl 60(%esp), %edi
+; CHECK-X86-NEXT: movl %edi, 12(%eax)
+; CHECK-X86-NEXT: movl %esi, 8(%eax)
+; CHECK-X86-NEXT: movl %edx, 4(%eax)
+; CHECK-X86-NEXT: movl %ecx, (%eax)
+; CHECK-X86-NEXT: popl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: popl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
+; CHECK-X86-NEXT: retl $4
+;
+; CHECK-MSVC64-LABEL: leading_args:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: movq 40(%rsp), %rax
+; CHECK-MSVC64-NEXT: movq 48(%rsp), %rdx
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: leading_args:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %edi
+; CHECK-MSVC32-NEXT: pushl %esi
+; CHECK-MSVC32-NEXT: movl 12(%esp), %eax
+; CHECK-MSVC32-NEXT: movl 48(%esp), %ecx
+; CHECK-MSVC32-NEXT: movl 52(%esp), %edx
+; CHECK-MSVC32-NEXT: movl 56(%esp), %esi
+; CHECK-MSVC32-NEXT: movl 60(%esp), %edi
+; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
+; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
+; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
+; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
+; CHECK-MSVC32-NEXT: popl %esi
+; CHECK-MSVC32-NEXT: popl %edi
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: leading_args:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: movq 40(%rsp), %rax
+; CHECK-MINGW-NEXT: movq 48(%rsp), %rdx
+; CHECK-MINGW-NEXT: retq
+ ret i128 %x
}
-define i128 @on_stack2(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i128 %a5, i128 %a6) {
-; CHECK-LABEL: on_stack2:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movq 24(%rsp), %rax
-; CHECK-NEXT: movq 32(%rsp), %rdx
-; CHECK-NEXT: retq
- ret i128 %a6
+; No longer in args on any platform
+define i128 @many_leading_args(i64 %_0, i64 %_1, i64 %_2, i64 %_3, i64 %_4, i128 %_5, i128 %x) {
+; CHECK-X64-LABEL: many_leading_args:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: movq 24(%rsp), %rax
+; CHECK-X64-NEXT: movq 32(%rsp), %rdx
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: many_leading_args:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: pushl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: pushl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
+; CHECK-X86-NEXT: .cfi_offset %esi, -12
+; CHECK-X86-NEXT: .cfi_offset %edi, -8
+; CHECK-X86-NEXT: movl 12(%esp), %eax
+; CHECK-X86-NEXT: movl 72(%esp), %ecx
+; CHECK-X86-NEXT: movl 76(%esp), %edx
+; CHECK-X86-NEXT: movl 80(%esp), %esi
+; CHECK-X86-NEXT: movl 84(%esp), %edi
+; CHECK-X86-NEXT: movl %edi, 12(%eax)
+; CHECK-X86-NEXT: movl %esi, 8(%eax)
+; CHECK-X86-NEXT: movl %edx, 4(%eax)
+; CHECK-X86-NEXT: movl %ecx, (%eax)
+; CHECK-X86-NEXT: popl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: popl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
+; CHECK-X86-NEXT: retl $4
+;
+; CHECK-MSVC64-LABEL: many_leading_args:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: movq 64(%rsp), %rax
+; CHECK-MSVC64-NEXT: movq 72(%rsp), %rdx
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: many_leading_args:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %edi
+; CHECK-MSVC32-NEXT: pushl %esi
+; CHECK-MSVC32-NEXT: movl 12(%esp), %eax
+; CHECK-MSVC32-NEXT: movl 72(%esp), %ecx
+; CHECK-MSVC32-NEXT: movl 76(%esp), %edx
+; CHECK-MSVC32-NEXT: movl 80(%esp), %esi
+; CHECK-MSVC32-NEXT: movl 84(%esp), %edi
+; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
+; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
+; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
+; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
+; CHECK-MSVC32-NEXT: popl %esi
+; CHECK-MSVC32-NEXT: popl %edi
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: many_leading_args:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: movq 64(%rsp), %rax
+; CHECK-MINGW-NEXT: movq 72(%rsp), %rdx
+; CHECK-MINGW-NEXT: retq
+ ret i128 %x
}
-define i64 @trailing_arg_on_stack(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i128 %a5, i64 %a6) {
-; CHECK-LABEL: trailing_arg_on_stack:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movq %r9, %rax
-; CHECK-NEXT: retq
- ret i64 %a6
+define i128 @trailing_arg(i64 %_0, i64 %_1, i64 %_2, i64 %_3, i64 %_4, i128 %x, i64 %_5) {
+; CHECK-X64-LABEL: trailing_arg:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: movq 8(%rsp), %rax
+; CHECK-X64-NEXT: movq 16(%rsp), %rdx
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: trailing_arg:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: pushl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: pushl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
+; CHECK-X86-NEXT: .cfi_offset %esi, -12
+; CHECK-X86-NEXT: .cfi_offset %edi, -8
+; CHECK-X86-NEXT: movl 12(%esp), %eax
+; CHECK-X86-NEXT: movl 56(%esp), %ecx
+; CHECK-X86-NEXT: movl 60(%esp), %edx
+; CHECK-X86-NEXT: movl 64(%esp), %esi
+; CHECK-X86-NEXT: movl 68(%esp), %edi
+; CHECK-X86-NEXT: movl %edi, 12(%eax)
+; CHECK-X86-NEXT: movl %esi, 8(%eax)
+; CHECK-X86-NEXT: movl %edx, 4(%eax)
+; CHECK-X86-NEXT: movl %ecx, (%eax)
+; CHECK-X86-NEXT: popl %esi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
+; CHECK-X86-NEXT: popl %edi
+; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
+; CHECK-X86-NEXT: retl $4
+;
+; CHECK-MSVC64-LABEL: trailing_arg:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: movq 48(%rsp), %rax
+; CHECK-MSVC64-NEXT: movq 56(%rsp), %rdx
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: trailing_arg:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %edi
+; CHECK-MSVC32-NEXT: pushl %esi
+; CHECK-MSVC32-NEXT: movl 12(%esp), %eax
+; CHECK-MSVC32-NEXT: movl 56(%esp), %ecx
+; CHECK-MSVC32-NEXT: movl 60(%esp), %edx
+; CHECK-MSVC32-NEXT: movl 64(%esp), %esi
+; CHECK-MSVC32-NEXT: movl 68(%esp), %edi
+; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
+; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
+; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
+; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
+; CHECK-MSVC32-NEXT: popl %esi
+; CHECK-MSVC32-NEXT: popl %edi
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: trailing_arg:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: movq 48(%rsp), %rax
+; CHECK-MINGW-NEXT: movq 56(%rsp), %rdx
+; CHECK-MINGW-NEXT: retq
+ ret i128 %x
+}
+
+define void @call_first_arg(i128 %x) nounwind {
+; CHECK-X64-LABEL: call_first_arg:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: pushq %rax
+; CHECK-X64-NEXT: callq first_arg at PLT
+; CHECK-X64-NEXT: popq %rax
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: call_first_arg:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: subl $40, %esp
+; CHECK-X86-NEXT: leal 12(%esp), %eax
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl %eax
+; CHECK-X86-NEXT: calll first_arg at PLT
+; CHECK-X86-NEXT: addl $56, %esp
+; CHECK-X86-NEXT: retl
+;
+; CHECK-MSVC64-LABEL: call_first_arg:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: subq $40, %rsp
+; CHECK-MSVC64-NEXT: callq first_arg
+; CHECK-MSVC64-NEXT: addq $40, %rsp
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: call_first_arg:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %ebp
+; CHECK-MSVC32-NEXT: movl %esp, %ebp
+; CHECK-MSVC32-NEXT: andl $-16, %esp
+; CHECK-MSVC32-NEXT: subl $32, %esp
+; CHECK-MSVC32-NEXT: movl %esp, %eax
+; CHECK-MSVC32-NEXT: pushl 20(%ebp)
+; CHECK-MSVC32-NEXT: pushl 16(%ebp)
+; CHECK-MSVC32-NEXT: pushl 12(%ebp)
+; CHECK-MSVC32-NEXT: pushl 8(%ebp)
+; CHECK-MSVC32-NEXT: pushl %eax
+; CHECK-MSVC32-NEXT: calll _first_arg
+; CHECK-MSVC32-NEXT: addl $20, %esp
+; CHECK-MSVC32-NEXT: movl %ebp, %esp
+; CHECK-MSVC32-NEXT: popl %ebp
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: call_first_arg:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: subq $40, %rsp
+; CHECK-MINGW-NEXT: callq first_arg
+; CHECK-MINGW-NEXT: addq $40, %rsp
+; CHECK-MINGW-NEXT: retq
+ call i128 @first_arg(i128 %x)
+ ret void
}
-define void @call_in_reg(i128 %x) nounwind {
-; CHECK-LABEL: call_in_reg:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: movq %rsi, %r9
-; CHECK-NEXT: movq %rdi, %r8
-; CHECK-NEXT: movl $1, %esi
-; CHECK-NEXT: movl $2, %edx
-; CHECK-NEXT: movl $3, %ecx
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: callq in_reg at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
- call i128 @in_reg(i64 0, i64 1, i64 2, i64 3, i128 %x)
+define void @call_leading_args(i128 %x) nounwind {
+; CHECK-X64-LABEL: call_leading_args:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: pushq %rax
+; CHECK-X64-NEXT: movq %rsi, %r9
+; CHECK-X64-NEXT: movq %rdi, %r8
+; CHECK-X64-NEXT: xorl %edi, %edi
+; CHECK-X64-NEXT: xorl %esi, %esi
+; CHECK-X64-NEXT: xorl %edx, %edx
+; CHECK-X64-NEXT: xorl %ecx, %ecx
+; CHECK-X64-NEXT: callq leading_args at PLT
+; CHECK-X64-NEXT: popq %rax
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: call_leading_args:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: subl $40, %esp
+; CHECK-X86-NEXT: leal 12(%esp), %eax
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl %eax
+; CHECK-X86-NEXT: calll leading_args at PLT
+; CHECK-X86-NEXT: addl $88, %esp
+; CHECK-X86-NEXT: retl
+;
+; CHECK-MSVC64-LABEL: call_leading_args:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: subq $56, %rsp
+; CHECK-MSVC64-NEXT: movq %rdx, 40(%rsp)
+; CHECK-MSVC64-NEXT: movq %rcx, 32(%rsp)
+; CHECK-MSVC64-NEXT: xorl %ecx, %ecx
+; CHECK-MSVC64-NEXT: xorl %edx, %edx
+; CHECK-MSVC64-NEXT: xorl %r8d, %r8d
+; CHECK-MSVC64-NEXT: xorl %r9d, %r9d
+; CHECK-MSVC64-NEXT: callq leading_args
+; CHECK-MSVC64-NEXT: addq $56, %rsp
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: call_leading_args:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %ebp
+; CHECK-MSVC32-NEXT: movl %esp, %ebp
+; CHECK-MSVC32-NEXT: andl $-16, %esp
+; CHECK-MSVC32-NEXT: subl $32, %esp
+; CHECK-MSVC32-NEXT: movl %esp, %eax
+; CHECK-MSVC32-NEXT: pushl 20(%ebp)
+; CHECK-MSVC32-NEXT: pushl 16(%ebp)
+; CHECK-MSVC32-NEXT: pushl 12(%ebp)
+; CHECK-MSVC32-NEXT: pushl 8(%ebp)
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl %eax
+; CHECK-MSVC32-NEXT: calll _leading_args
+; CHECK-MSVC32-NEXT: addl $52, %esp
+; CHECK-MSVC32-NEXT: movl %ebp, %esp
+; CHECK-MSVC32-NEXT: popl %ebp
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: call_leading_args:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: subq $56, %rsp
+; CHECK-MINGW-NEXT: movq %rdx, 40(%rsp)
+; CHECK-MINGW-NEXT: movq %rcx, 32(%rsp)
+; CHECK-MINGW-NEXT: xorl %ecx, %ecx
+; CHECK-MINGW-NEXT: xorl %edx, %edx
+; CHECK-MINGW-NEXT: xorl %r8d, %r8d
+; CHECK-MINGW-NEXT: xorl %r9d, %r9d
+; CHECK-MINGW-NEXT: callq leading_args
+; CHECK-MINGW-NEXT: addq $56, %rsp
+; CHECK-MINGW-NEXT: retq
+ call i128 @leading_args(i64 0, i64 0, i64 0, i64 0, i128 %x)
ret void
}
-define void @call_on_stack(i128 %x) nounwind {
-; CHECK-LABEL: call_on_stack:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: movq %rsi, %rax
-; CHECK-NEXT: movq %rdi, %r9
-; CHECK-NEXT: movl $1, %esi
-; CHECK-NEXT: movl $2, %edx
-; CHECK-NEXT: movl $3, %ecx
-; CHECK-NEXT: movl $4, %r8d
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: pushq %r9
-; CHECK-NEXT: callq on_stack at PLT
-; CHECK-NEXT: addq $16, %rsp
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
- call i128 @on_stack(i64 0, i64 1, i64 2, i64 3, i64 4, i128 %x)
+define void @call_many_leading_args(i128 %x) nounwind {
+; CHECK-X64-LABEL: call_many_leading_args:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: pushq %rax
+; CHECK-X64-NEXT: movq %rsi, %rax
+; CHECK-X64-NEXT: movq %rdi, %r10
+; CHECK-X64-NEXT: xorl %edi, %edi
+; CHECK-X64-NEXT: xorl %esi, %esi
+; CHECK-X64-NEXT: xorl %edx, %edx
+; CHECK-X64-NEXT: xorl %ecx, %ecx
+; CHECK-X64-NEXT: xorl %r8d, %r8d
+; CHECK-X64-NEXT: xorl %r9d, %r9d
+; CHECK-X64-NEXT: pushq %rax
+; CHECK-X64-NEXT: pushq %r10
+; CHECK-X64-NEXT: callq many_leading_args at PLT
+; CHECK-X64-NEXT: addq $16, %rsp
+; CHECK-X64-NEXT: popq %rax
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: call_many_leading_args:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: subl $40, %esp
+; CHECK-X86-NEXT: leal 12(%esp), %eax
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl %eax
+; CHECK-X86-NEXT: calll many_leading_args at PLT
+; CHECK-X86-NEXT: addl $104, %esp
+; CHECK-X86-NEXT: retl
+;
+; CHECK-MSVC64-LABEL: call_many_leading_args:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: subq $72, %rsp
+; CHECK-MSVC64-NEXT: movq %rdx, 56(%rsp)
+; CHECK-MSVC64-NEXT: movq %rcx, 48(%rsp)
+; CHECK-MSVC64-NEXT: movq $0, 40(%rsp)
+; CHECK-MSVC64-NEXT: movq $0, 32(%rsp)
+; CHECK-MSVC64-NEXT: xorl %ecx, %ecx
+; CHECK-MSVC64-NEXT: xorl %edx, %edx
+; CHECK-MSVC64-NEXT: xorl %r8d, %r8d
+; CHECK-MSVC64-NEXT: xorl %r9d, %r9d
+; CHECK-MSVC64-NEXT: callq many_leading_args
+; CHECK-MSVC64-NEXT: addq $72, %rsp
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: call_many_leading_args:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %ebp
+; CHECK-MSVC32-NEXT: movl %esp, %ebp
+; CHECK-MSVC32-NEXT: andl $-16, %esp
+; CHECK-MSVC32-NEXT: subl $32, %esp
+; CHECK-MSVC32-NEXT: movl %esp, %eax
+; CHECK-MSVC32-NEXT: pushl 20(%ebp)
+; CHECK-MSVC32-NEXT: pushl 16(%ebp)
+; CHECK-MSVC32-NEXT: pushl 12(%ebp)
+; CHECK-MSVC32-NEXT: pushl 8(%ebp)
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl %eax
+; CHECK-MSVC32-NEXT: calll _many_leading_args
+; CHECK-MSVC32-NEXT: addl $68, %esp
+; CHECK-MSVC32-NEXT: movl %ebp, %esp
+; CHECK-MSVC32-NEXT: popl %ebp
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: call_many_leading_args:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: subq $72, %rsp
+; CHECK-MINGW-NEXT: movq %rdx, 56(%rsp)
+; CHECK-MINGW-NEXT: movq %rcx, 48(%rsp)
+; CHECK-MINGW-NEXT: movq $0, 40(%rsp)
+; CHECK-MINGW-NEXT: movq $0, 32(%rsp)
+; CHECK-MINGW-NEXT: xorl %ecx, %ecx
+; CHECK-MINGW-NEXT: xorl %edx, %edx
+; CHECK-MINGW-NEXT: xorl %r8d, %r8d
+; CHECK-MINGW-NEXT: xorl %r9d, %r9d
+; CHECK-MINGW-NEXT: callq many_leading_args
+; CHECK-MINGW-NEXT: addq $72, %rsp
+; CHECK-MINGW-NEXT: retq
+ call i128 @many_leading_args(i64 0, i64 0, i64 0, i64 0, i128 0, i128 %x)
ret void
}
-define void @call_trailing_arg_on_stack(i128 %x, i64 %y) nounwind {
-; CHECK-LABEL: call_trailing_arg_on_stack:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: movq %rdx, %r9
-; CHECK-NEXT: movq %rsi, %rax
-; CHECK-NEXT: movq %rdi, %r10
-; CHECK-NEXT: movl $1, %esi
-; CHECK-NEXT: movl $2, %edx
-; CHECK-NEXT: movl $3, %ecx
-; CHECK-NEXT: movl $4, %r8d
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: pushq %r10
-; CHECK-NEXT: callq trailing_arg_on_stack at PLT
-; CHECK-NEXT: addq $16, %rsp
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
- call i128 @trailing_arg_on_stack(i64 0, i64 1, i64 2, i64 3, i64 4, i128 %x, i64 %y)
+define void @call_trailing_arg(i128 %x) nounwind {
+; CHECK-X64-LABEL: call_trailing_arg:
+; CHECK-X64: # %bb.0:
+; CHECK-X64-NEXT: pushq %rax
+; CHECK-X64-NEXT: movq %rsi, %r9
+; CHECK-X64-NEXT: movq %rdi, %r8
+; CHECK-X64-NEXT: xorl %edi, %edi
+; CHECK-X64-NEXT: xorl %esi, %esi
+; CHECK-X64-NEXT: xorl %edx, %edx
+; CHECK-X64-NEXT: xorl %ecx, %ecx
+; CHECK-X64-NEXT: callq trailing_arg at PLT
+; CHECK-X64-NEXT: popq %rax
+; CHECK-X64-NEXT: retq
+;
+; CHECK-X86-LABEL: call_trailing_arg:
+; CHECK-X86: # %bb.0:
+; CHECK-X86-NEXT: subl $40, %esp
+; CHECK-X86-NEXT: leal 12(%esp), %eax
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl 56(%esp)
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl $0
+; CHECK-X86-NEXT: pushl %eax
+; CHECK-X86-NEXT: calll trailing_arg at PLT
+; CHECK-X86-NEXT: addl $88, %esp
+; CHECK-X86-NEXT: retl
+;
+; CHECK-MSVC64-LABEL: call_trailing_arg:
+; CHECK-MSVC64: # %bb.0:
+; CHECK-MSVC64-NEXT: subq $56, %rsp
+; CHECK-MSVC64-NEXT: movq %rdx, 40(%rsp)
+; CHECK-MSVC64-NEXT: movq %rcx, 32(%rsp)
+; CHECK-MSVC64-NEXT: xorl %ecx, %ecx
+; CHECK-MSVC64-NEXT: xorl %edx, %edx
+; CHECK-MSVC64-NEXT: xorl %r8d, %r8d
+; CHECK-MSVC64-NEXT: xorl %r9d, %r9d
+; CHECK-MSVC64-NEXT: callq trailing_arg
+; CHECK-MSVC64-NEXT: addq $56, %rsp
+; CHECK-MSVC64-NEXT: retq
+;
+; CHECK-MSVC32-LABEL: call_trailing_arg:
+; CHECK-MSVC32: # %bb.0:
+; CHECK-MSVC32-NEXT: pushl %ebp
+; CHECK-MSVC32-NEXT: movl %esp, %ebp
+; CHECK-MSVC32-NEXT: andl $-16, %esp
+; CHECK-MSVC32-NEXT: subl $32, %esp
+; CHECK-MSVC32-NEXT: movl %esp, %eax
+; CHECK-MSVC32-NEXT: pushl 20(%ebp)
+; CHECK-MSVC32-NEXT: pushl 16(%ebp)
+; CHECK-MSVC32-NEXT: pushl 12(%ebp)
+; CHECK-MSVC32-NEXT: pushl 8(%ebp)
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl $0
+; CHECK-MSVC32-NEXT: pushl %eax
+; CHECK-MSVC32-NEXT: calll _trailing_arg
+; CHECK-MSVC32-NEXT: addl $52, %esp
+; CHECK-MSVC32-NEXT: movl %ebp, %esp
+; CHECK-MSVC32-NEXT: popl %ebp
+; CHECK-MSVC32-NEXT: retl
+;
+; CHECK-MINGW-LABEL: call_trailing_arg:
+; CHECK-MINGW: # %bb.0:
+; CHECK-MINGW-NEXT: subq $56, %rsp
+; CHECK-MINGW-NEXT: movq %rdx, 40(%rsp)
+; CHECK-MINGW-NEXT: movq %rcx, 32(%rsp)
+; CHECK-MINGW-NEXT: xorl %ecx, %ecx
+; CHECK-MINGW-NEXT: xorl %edx, %edx
+; CHECK-MINGW-NEXT: xorl %r8d, %r8d
+; CHECK-MINGW-NEXT: xorl %r9d, %r9d
+; CHECK-MINGW-NEXT: callq trailing_arg
+; CHECK-MINGW-NEXT: addq $56, %rsp
+; CHECK-MINGW-NEXT: retq
+ call i128 @trailing_arg(i64 0, i64 0, i64 0, i64 0, i128 %x)
ret void
}
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