[llvm] relaxed simd fma (PR #147487)

[Matt Arsenault via llvm-commits]

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@@ -3411,6 +3418,62 @@ static SDValue performSETCCCombine(SDNode *N,
   }
   return SDValue();
 }
+static bool canRelaxSimd(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
+  EVT VecVT = N->getValueType(0);
+
+  // INFO: WebAssembly doesn't have scalar fma yet
+  // https://github.com/WebAssembly/design/issues/1391
+  if (!VecVT.isVector())
+    return false;
+
+  // Allows fp fusing
+  if (!N->getFlags().hasAllowContract())
+    return false;
+
+  if (N->getValueType(0).bitsGT(MVT::f128))
+    return false;
+
+  return true;
+}
+static SDValue performFAddCombine(SDNode *N,
+                                  TargetLowering::DAGCombinerInfo &DCI) {
+  assert(N->getOpcode() == ISD::FADD);
+  using namespace llvm::SDPatternMatch;
+
+  // INFO: WebAssembly doesn't have scalar fma yet
+  // https://github.com/WebAssembly/design/issues/1391
+  EVT VecVT = N->getValueType(0);
+  if (!VecVT.isVector())
+    return SDValue();
+
+  if (!canRelaxSimd(N, DCI))
+    return SDValue();
+
+  SDLoc DL(N);
+  SDValue A, B, C;
+  SelectionDAG &DAG = DCI.DAG;
+  if (sd_match(N, m_FAdd(m_Value(A), m_FMul(m_Value(B), m_Value(C)))))
+    return DAG.getNode(
+        ISD::INTRINSIC_WO_CHAIN, DL, VecVT,
+        {DAG.getConstant(Intrinsic::wasm_relaxed_madd, DL, MVT::i32), A, B, C});
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arsenm wrote:

It seems this is equivalent to ISD::FMAD? Report that as legal and use it instead? 

https://github.com/llvm/llvm-project/pull/147487