[llvm] [TTI] Don't drop VP intrinsic args when delegating to non-vp equivalent (PR #147677)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 9 18:09:22 PDT 2025
================
@@ -1781,18 +1781,25 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
assert(ICA.getArgTypes().size() >= 2 &&
"Expected VPIntrinsic to have Mask and Vector Length args and "
"types");
+
+ ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
+ if (!ICA.isTypeBasedOnly())
+ NewArgs = NewArgs.drop_back(2);
ArrayRef<Type *> NewTys = ArrayRef(ICA.getArgTypes()).drop_back(2);
// VPReduction intrinsics have a start value argument that their non-vp
// counterparts do not have, except for the fadd and fmul non-vp
// counterpart.
if (VPReductionIntrinsic::isVPReduction(ICA.getID()) &&
*FID != Intrinsic::vector_reduce_fadd &&
- *FID != Intrinsic::vector_reduce_fmul)
+ *FID != Intrinsic::vector_reduce_fmul) {
+ if (!ICA.isTypeBasedOnly())
+ NewArgs = NewArgs.drop_front();
NewTys = NewTys.drop_front();
+ }
----------------
lukel97 wrote:
Yeah it's covered by the existing tests at llvm/test/Analysis/CostModel/RISCV/reduce-fadd/fmul.ll. It just so happens that there's no test diff with that change because the type-based and value-based costing is the same for these intrinsics, i.e. here's the code for the value costing path:
```c++
case Intrinsic::vector_reduce_add:
case Intrinsic::vector_reduce_mul:
case Intrinsic::vector_reduce_and:
case Intrinsic::vector_reduce_or:
case Intrinsic::vector_reduce_xor:
case Intrinsic::vector_reduce_smax:
case Intrinsic::vector_reduce_smin:
case Intrinsic::vector_reduce_fmax:
case Intrinsic::vector_reduce_fmin:
case Intrinsic::vector_reduce_fmaximum:
case Intrinsic::vector_reduce_fminimum:
case Intrinsic::vector_reduce_umax:
case Intrinsic::vector_reduce_umin: {
IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
return getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
}
```
https://github.com/llvm/llvm-project/pull/147677
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