[llvm] [NVPTX] Rework and cleanup FTZ ISel (PR #146410)

[Alex MacLean via llvm-commits]

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@@ -198,28 +176,29 @@ def RI64 : Operand<Any>;
 
 // Utility class to wrap up information about a register and DAG type for more
 // convenient iteration and parameterization
-class RegTyInfo<ValueType ty, NVPTXRegClass rc, Operand imm, SDNode imm_node,
+class RegTyInfo<ValueType ty, NVPTXRegClass rc, string str, Operand imm, SDNode imm_node,
                 bit supports_imm = 1> {
   ValueType Ty = ty;
   NVPTXRegClass RC = rc;
   Operand Imm = imm;
   SDNode ImmNode = imm_node;
   bit SupportsImm = supports_imm;
   int Size = ty.Size;
+  string Str = str;
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AlexMaclean wrote:

Fixed

https://github.com/llvm/llvm-project/pull/146410