[llvm] 1d3b2c5 - [RISCV] Replace undef with poison for the XAndesVBFHCvt and XAndesVPackFPH intrinsic tests

[Jim Lin via llvm-commits]

Author: Jim Lin
Date: 2025-07-09T16:05:24+08:00
New Revision: 1d3b2c562e45ff4b586accb630c538c0e511900c

URL: https://github.com/llvm/llvm-project/commit/1d3b2c562e45ff4b586accb630c538c0e511900c
DIFF: https://github.com/llvm/llvm-project/commit/1d3b2c562e45ff4b586accb630c538c0e511900c.diff

LOG: [RISCV] Replace undef with poison for the XAndesVBFHCvt and XAndesVPackFPH intrinsic tests

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll
    llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
    llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
    llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll b/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll
index 3cde575db8f05..c72b681816e76 100644
--- a/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll
@@ -13,7 +13,7 @@ define <vscale x 1 x bfloat> @intrinsic_vfncvt_bf16.s_nxv1bf16_nxv1f32(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 1 x bfloat> @llvm.riscv.nds.vfncvt.bf16.s.nxv1bf16.nxv1f32(
-    <vscale x 1 x bfloat> undef,
+    <vscale x 1 x bfloat> poison,
     <vscale x 1 x float> %0,
     iXLen 7, iXLen %1)
 
@@ -29,7 +29,7 @@ define <vscale x 2 x bfloat> @intrinsic_vfncvt_bf16.s_nxv2bf16_nxv2f32(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 2 x bfloat> @llvm.riscv.nds.vfncvt.bf16.s.nxv2bf16.nxv2f32(
-    <vscale x 2 x bfloat> undef,
+    <vscale x 2 x bfloat> poison,
     <vscale x 2 x float> %0,
     iXLen 7, iXLen %1)
 
@@ -45,7 +45,7 @@ define <vscale x 4 x bfloat> @intrinsic_vfncvt_bf16.s_nxv4bf16_nxv4f32(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 4 x bfloat> @llvm.riscv.nds.vfncvt.bf16.s.nxv4bf16.nxv4f32(
-    <vscale x 4 x bfloat> undef,
+    <vscale x 4 x bfloat> poison,
     <vscale x 4 x float> %0,
     iXLen 7, iXLen %1)
 
@@ -61,7 +61,7 @@ define <vscale x 8 x bfloat> @intrinsic_vfncvt_bf16.s_nxv8bf16_nxv8f32(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 8 x bfloat> @llvm.riscv.nds.vfncvt.bf16.s.nxv8bf16.nxv8f32(
-    <vscale x 8 x bfloat> undef,
+    <vscale x 8 x bfloat> poison,
     <vscale x 8 x float> %0,
     iXLen 7, iXLen %1)
 
@@ -77,7 +77,7 @@ define <vscale x 16 x bfloat> @intrinsic_vfncvt_bf16.s_nxv16bf16_nxv16f32(<vscal
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 16 x bfloat> @llvm.riscv.nds.vfncvt.bf16.s.nxv16bf16.nxv16f32(
-    <vscale x 16 x bfloat> undef,
+    <vscale x 16 x bfloat> poison,
     <vscale x 16 x float> %0,
     iXLen 7, iXLen %1)
 

diff  --git a/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll b/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
index d44295d2480c1..3d59ac840f707 100644
--- a/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
@@ -13,7 +13,7 @@ define <vscale x 1 x float> @intrinsic_vfwcvt_s.bf16_nxv1f32_nxv1bf16(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 1 x float> @llvm.riscv.nds.vfwcvt.s.bf16.nxv1f32.nxv1bf16(
-    <vscale x 1 x float> undef,
+    <vscale x 1 x float> poison,
     <vscale x 1 x bfloat> %0,
     iXLen %1)
 
@@ -29,7 +29,7 @@ define <vscale x 2 x float> @intrinsic_vfwcvt_s.bf16_nxv2f32_nxv2bf16(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 2 x float> @llvm.riscv.nds.vfwcvt.s.bf16.nxv2f32.nxv2bf16(
-    <vscale x 2 x float> undef,
+    <vscale x 2 x float> poison,
     <vscale x 2 x bfloat> %0,
     iXLen %1)
 
@@ -45,7 +45,7 @@ define <vscale x 4 x float> @intrinsic_vfwcvt_s.bf16_nxv4f32_nxv4bf16(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 4 x float> @llvm.riscv.nds.vfwcvt.s.bf16.nxv4f32.nxv4bf16(
-    <vscale x 4 x float> undef,
+    <vscale x 4 x float> poison,
     <vscale x 4 x bfloat> %0,
     iXLen %1)
 
@@ -61,7 +61,7 @@ define <vscale x 8 x float> @intrinsic_vfwcvt_s.bf16_nxv8f32_nxv8bf16(<vscale x
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 8 x float> @llvm.riscv.nds.vfwcvt.s.bf16.nxv8f32.nxv8bf16(
-    <vscale x 8 x float> undef,
+    <vscale x 8 x float> poison,
     <vscale x 8 x bfloat> %0,
     iXLen %1)
 
@@ -77,7 +77,7 @@ define <vscale x 16 x float> @intrinsic_vfwcvt_s.bf16_nxv16f32_nxv16bf16(<vscale
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 16 x float> @llvm.riscv.nds.vfwcvt.s.bf16.nxv16f32.nxv16bf16(
-    <vscale x 16 x float> undef,
+    <vscale x 16 x float> poison,
     <vscale x 16 x bfloat> %0,
     iXLen %1)
 

diff  --git a/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll b/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
index bddd7719d728f..455211fe070fa 100644
--- a/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
@@ -14,7 +14,7 @@ define <vscale x 1 x half> @intrinsic_vfpmadb_vf_nxv1f16_nxv1f16_f32(<vscale x 1
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 1 x half> @llvm.riscv.nds.vfpmadb.nxv1f16.f32(
-    <vscale x 1 x half> undef,
+    <vscale x 1 x half> poison,
     <vscale x 1 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -50,7 +50,7 @@ define <vscale x 2 x half> @intrinsic_vfpmadb_vf_nxv2f16_nxv2f16_f32(<vscale x 2
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 2 x half> @llvm.riscv.nds.vfpmadb.nxv2f16.f32(
-    <vscale x 2 x half> undef,
+    <vscale x 2 x half> poison,
     <vscale x 2 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -86,7 +86,7 @@ define <vscale x 4 x half> @intrinsic_vfpmadb_vf_nxv4f16_nxv4f16_f32(<vscale x 4
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 4 x half> @llvm.riscv.nds.vfpmadb.nxv4f16.f32(
-    <vscale x 4 x half> undef,
+    <vscale x 4 x half> poison,
     <vscale x 4 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -122,7 +122,7 @@ define <vscale x 8 x half> @intrinsic_vfpmadb_vf_nxv8f16_nxv8f16_f32(<vscale x 8
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 8 x half> @llvm.riscv.nds.vfpmadb.nxv8f16.f32(
-    <vscale x 8 x half> undef,
+    <vscale x 8 x half> poison,
     <vscale x 8 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -158,7 +158,7 @@ define <vscale x 16 x half> @intrinsic_vfpmadb_vf_nxv16f16_nxv16f16_f32(<vscale
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 16 x half> @llvm.riscv.nds.vfpmadb.nxv16f16.f32(
-    <vscale x 16 x half> undef,
+    <vscale x 16 x half> poison,
     <vscale x 16 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -194,7 +194,7 @@ define <vscale x 32 x half> @intrinsic_vfpmadb_vf_nxv32f16_nxv32f16_f32(<vscale
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 32 x half> @llvm.riscv.nds.vfpmadb.nxv32f16.f32(
-    <vscale x 32 x half> undef,
+    <vscale x 32 x half> poison,
     <vscale x 32 x half> %0,
     float %1, iXLen 0, iXLen %2)
 

diff  --git a/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll b/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
index c920c710f6125..286ab607941cf 100644
--- a/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
@@ -14,7 +14,7 @@ define <vscale x 1 x half> @intrinsic_vfpmadt_vf_nxv1f16_nxv1f16_f32(<vscale x 1
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 1 x half> @llvm.riscv.nds.vfpmadt.nxv1f16.f32(
-    <vscale x 1 x half> undef,
+    <vscale x 1 x half> poison,
     <vscale x 1 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -50,7 +50,7 @@ define <vscale x 2 x half> @intrinsic_vfpmadt_vf_nxv2f16_nxv2f16_f32(<vscale x 2
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 2 x half> @llvm.riscv.nds.vfpmadt.nxv2f16.f32(
-    <vscale x 2 x half> undef,
+    <vscale x 2 x half> poison,
     <vscale x 2 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -86,7 +86,7 @@ define <vscale x 4 x half> @intrinsic_vfpmadt_vf_nxv4f16_nxv4f16_f32(<vscale x 4
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 4 x half> @llvm.riscv.nds.vfpmadt.nxv4f16.f32(
-    <vscale x 4 x half> undef,
+    <vscale x 4 x half> poison,
     <vscale x 4 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -122,7 +122,7 @@ define <vscale x 8 x half> @intrinsic_vfpmadt_vf_nxv8f16_nxv8f16_f32(<vscale x 8
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 8 x half> @llvm.riscv.nds.vfpmadt.nxv8f16.f32(
-    <vscale x 8 x half> undef,
+    <vscale x 8 x half> poison,
     <vscale x 8 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -158,7 +158,7 @@ define <vscale x 16 x half> @intrinsic_vfpmadt_vf_nxv16f16_nxv16f16_f32(<vscale
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 16 x half> @llvm.riscv.nds.vfpmadt.nxv16f16.f32(
-    <vscale x 16 x half> undef,
+    <vscale x 16 x half> poison,
     <vscale x 16 x half> %0,
     float %1, iXLen 0, iXLen %2)
 
@@ -194,7 +194,7 @@ define <vscale x 32 x half> @intrinsic_vfpmadt_vf_nxv32f16_nxv32f16_f32(<vscale
 ; CHECK-NEXT:    ret
 entry:
   %a = tail call <vscale x 32 x half> @llvm.riscv.nds.vfpmadt.nxv32f16.f32(
-    <vscale x 32 x half> undef,
+    <vscale x 32 x half> poison,
     <vscale x 32 x half> %0,
     float %1, iXLen 0, iXLen %2)