[llvm] [AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and GFX10 (PR #142188)

[Jun Wang via llvm-commits]

jwanggit86 wrote:

> > > Does the bswap pattern at SIInstructions.td:3109 need an update to use the new pseudo?
> > 
> > 
> > After some digging, I noticed that there is another pattern that matches bswap to V_PERM_B32 instead of V_ALIGNBIT_B32. This pattern actually takes precedence. So during instruction selection, for the 32 bit bswap, V_PERM_B32 is selected. The 64-bit bswap on the other hand is changed to two 32-it bswap during legalization. I added some run lines in one of the test files to confirm the selection of V_PERM_B32.
> 
> Can the unused pattern be deleted in a follow up commit?

The patterns that maps to V_ALIGNBIT is used pre-GFX8; the one that maps to V_PERM_B32 is used in GFX8+. I've added a comment.

https://github.com/llvm/llvm-project/pull/142188