[llvm] [RISCV] AddEdge between first mask producer and user of V0 (PR #146855)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 8 14:48:38 PDT 2025
================
@@ -68,11 +72,24 @@ class RISCVVectorMaskDAGMutation : public ScheduleDAGMutation {
void apply(ScheduleDAGInstrs *DAG) override {
SUnit *NearestUseV0SU = nullptr;
+ SmallVector<SUnit *, 2> DefMask;
for (SUnit &SU : DAG->SUnits) {
const MachineInstr *MI = SU.getInstr();
- if (MI->findRegisterUseOperand(RISCV::V0, TRI))
+ if (isSoleUseCopyToV0(SU))
+ DefMask.push_back(&SU);
+
+ if (MI->findRegisterUseOperand(RISCV::V0, TRI)) {
NearestUseV0SU = &SU;
+ // Copy may not be a real use, so skip it here.
+ if (DefMask.size() > 1 && !MI->isCopy())
+ for (SUnit *Def : DefMask)
+ DAG->addEdge(Def, SDep(&SU, SDep::Artificial));
+
+ if (DefMask.size() > 0)
----------------
topperc wrote:
!DefMask.empty()
https://github.com/llvm/llvm-project/pull/146855
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