[llvm] [AMDGPU][SDAG] Use the f16 lowering for bf16 safe divisions. (PR #147530)

[Ivan Kosarev via llvm-commits]

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@@ -11265,10 +11266,14 @@ SDValue SITargetLowering::LowerFDIV16(SDValue Op, SelectionDAG &DAG) const {
                         DAG.getConstant(0xff800000, SL, MVT::i32));
   Tmp = DAG.getNode(ISD::BITCAST, SL, MVT::f32, TmpCast);
   Quot = DAG.getNode(ISD::FADD, SL, MVT::f32, Tmp, Quot, Op->getFlags());
-  SDValue RDst = DAG.getNode(ISD::FP_ROUND, SL, MVT::f16, Quot,
+
+  EVT FixupVT = VT == MVT::bf16 ? MVT::f32 : VT;
+  SDValue RDst = DAG.getNode(ISD::FP_ROUND, SL, FixupVT, Quot,
                              DAG.getTargetConstant(0, SL, MVT::i32));
-  return DAG.getNode(AMDGPUISD::DIV_FIXUP, SL, MVT::f16, RDst, RHS, LHS,
-                     Op->getFlags());
+  SDValue Fixup = DAG.getNode(AMDGPUISD::DIV_FIXUP, SL, FixupVT, RDst, RHS, LHS,
+                              Op->getFlags());
+  return DAG.getNode(ISD::FP_ROUND, SL, VT, Fixup,
+                     DAG.getTargetConstant(0, SL, MVT::i32));
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kosarev wrote:

I might not know know all the corner cases to take into account here, but the thinking is, with the intermediate f32 computations the range should be large enough for bf16 and if the precision is sufficient for f16, then it should be enough for bf16 as well.

https://github.com/llvm/llvm-project/pull/147530