[llvm] [NFC][AMDGPU] Add missing test cases for gfx1250 (PR #147521)
Shilei Tian via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 8 06:34:09 PDT 2025
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/147521
That was caused by mistake when bringing up changes to upstream.
>From 03a59b374973c4384695a11bf2b5e134198340e4 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Tue, 8 Jul 2025 09:32:50 -0400
Subject: [PATCH] [NFC][AMDGPU] Add missing test cases for gfx1250
That was caused by mistake when bringing up changes to upstream.
---
.../gfx1250_asm_vop3_from_vop1_dpp8-fake16.s | 4 +
.../AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s | 8 ++
.../AMDGPU/gfx1250_dasm_vop3_from_vop1.txt | 83 +++++++++++++++++++
3 files changed, 95 insertions(+)
diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
index 8e0bdfeb78853..a8c40a7328363 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
@@ -2,6 +2,10 @@
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -show-encoding < %s | FileCheck --check-prefix=GFX1250 %s
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX12-ERR --implicit-check-not=error: --strict-whitespace %s
+v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
+// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
+// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+
v_cvt_f16_bf8 v150, v2 dpp8:[7,6,5,4,3,2,1,0]
// GFX1250: v_cvt_f16_bf8_e64_dpp v150, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x96,0x00,0xf8,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
index eaf63eabea422..5cd63a7d2a3ab 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
@@ -2,6 +2,14 @@
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -show-encoding < %s | FileCheck --check-prefix=GFX1250 %s
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX12-ERR --implicit-check-not=error: --strict-whitespace %s
+v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
+// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
+// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+
+v_cvt_f32_bf16_e64_dpp v5, v128.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v128.h op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x80,0x77,0x39,0x05]
+// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+
v_cvt_f16_bf8 v150.l, v2 dpp8:[7,6,5,4,3,2,1,0]
// GFX1250: v_cvt_f16_bf8_e64_dpp v150.l, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x96,0x00,0xf8,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
index b09ddc20b8034..be37aafb04024 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
@@ -2,6 +2,89 @@
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX1250,GFX1250-REAL16 %s
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX1250,GFX1250-FAKE16 %s
+0x05,0x00,0xf2,0xd5,0xc1,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, -1 ; encoding: [0x05,0x00,0xf2,0xd5,0xc1,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x7f,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, exec_hi ; encoding: [0x05,0x00,0xf2,0xd5,0x7f,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x7e,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, exec_lo ; encoding: [0x05,0x00,0xf2,0xd5,0x7e,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x7d,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, m0 ; encoding: [0x05,0x00,0xf2,0xd5,0x7d,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x7c,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, null ; encoding: [0x05,0x00,0xf2,0xd5,0x7c,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x01,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, s1 ; encoding: [0x05,0x00,0xf2,0xd5,0x01,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x69,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, s105 ; encoding: [0x05,0x00,0xf2,0xd5,0x69,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x7b,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, ttmp15 ; encoding: [0x05,0x00,0xf2,0xd5,0x7b,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x01,0x01,0x00,0x00
+# GFX1250-REAL16: v_cvt_f32_bf16_e64 v5, v1.l ; encoding: [0x05,0x00,0xf2,0xd5,0x01,0x01,0x00,0x00]
+# GFX1250-FAKE16: v_cvt_f32_bf16_e64 v5, v1 ; encoding: [0x05,0x00,0xf2,0xd5,0x01,0x01,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0xff,0x01,0x00,0x00
+# GFX1250-REAL16: v_cvt_f32_bf16_e64 v5, v255.l ; encoding: [0x05,0x00,0xf2,0xd5,0xff,0x01,0x00,0x00]
+# GFX1250-FAKE16: v_cvt_f32_bf16_e64 v5, v255 ; encoding: [0x05,0x00,0xf2,0xd5,0xff,0x01,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x6b,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, vcc_hi ; encoding: [0x05,0x00,0xf2,0xd5,0x6b,0x00,0x00,0x00]
+
+0x05,0x00,0xf2,0xd5,0x6a,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, vcc_lo ; encoding: [0x05,0x00,0xf2,0xd5,0x6a,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x01,0x01,0x00,0x00
+# GFX1250-REAL16: v_cvt_f32_bf16_e64 v5, v1.h op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x01,0x01,0x00,0x00]
+# GFX1250-FAKE16: v_cvt_f32_bf16_e64 v5, v1 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x01,0x01,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0xff,0x01,0x00,0x00
+# GFX1250-REAL16: v_cvt_f32_bf16_e64 v5, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xff,0x01,0x00,0x00]
+# GFX1250-FAKE16: v_cvt_f32_bf16_e64 v5, v255 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xff,0x01,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x01,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, s1 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x01,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x69,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, s105 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x69,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x6a,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, vcc_lo op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x6a,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x6b,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, vcc_hi op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x6b,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x7b,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, ttmp15 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x7b,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x7d,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, m0 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x7d,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x7e,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, exec_lo op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x7e,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x7f,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, exec_hi op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x7f,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x7c,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, null op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x7c,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0xc1,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, -1 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xc1,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0xfd,0x00,0x00,0x00
+# GFX1250: v_cvt_f32_bf16_e64 v5, src_scc op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xfd,0x00,0x00,0x00]
+
+0x05,0x08,0xf2,0xd5,0x80,0x01,0x00,0x00
+# GFX1250-REAL16: v_cvt_f32_bf16_e64 v5, v128.h op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x80,0x01,0x00,0x00]
+# GFX1250-FAKE16: v_cvt_f32_bf16_e64 v5, v128 op_sel:[1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0x80,0x01,0x00,0x00]
+
0x01,0x10,0xf8,0xd5,0x02,0x01,0x00,0x00
# GFX1250-REAL16: v_cvt_f16_bf8_e64 v1.l, v2 byte_sel:1 ; encoding: [0x01,0x10,0xf8,0xd5,0x02,0x01,0x00,0x00]
# GFX1250-FAKE16: v_cvt_f16_bf8_e64 v1, v2 byte_sel:1 ; encoding: [0x01,0x10,0xf8,0xd5,0x02,0x01,0x00,0x00]
More information about the llvm-commits
mailing list