[llvm] 71f6bfe - [AArch64] Add mir test coverage for madd imm combine. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 8 04:59:59 PDT 2025
Author: David Green
Date: 2025-07-08T12:59:54+01:00
New Revision: 71f6bfebc2cf36c87910e6e12b3ae3f564db0bc5
URL: https://github.com/llvm/llvm-project/commit/71f6bfebc2cf36c87910e6e12b3ae3f564db0bc5
DIFF: https://github.com/llvm/llvm-project/commit/71f6bfebc2cf36c87910e6e12b3ae3f564db0bc5.diff
LOG: [AArch64] Add mir test coverage for madd imm combine. NFC
Added:
llvm/test/CodeGen/AArch64/machine-combiner-maddimm.mir
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/machine-combiner-maddimm.mir b/llvm/test/CodeGen/AArch64/machine-combiner-maddimm.mir
new file mode 100644
index 0000000000000..dc75c8c61c53c
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/machine-combiner-maddimm.mir
@@ -0,0 +1,147 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-combiner -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name: madd_addwi
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $w0, $w1
+
+ ; CHECK-LABEL: name: madd_addwi
+ ; CHECK: liveins: $w0, $w1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
+ ; CHECK-NEXT: [[MOVZWi:%[0-9]+]]:gpr32common = nsw MOVZWi 79, 0
+ ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32common = nsw MADDWrrr [[COPY1]], [[COPY]], [[MOVZWi]]
+ ; CHECK-NEXT: $w0 = COPY [[MADDWrrr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %0:gpr32 = COPY $w0
+ %1:gpr32 = COPY $w1
+ %2:gpr32common = nsw MADDWrrr %1:gpr32, %0:gpr32, $wzr
+ %3:gpr32sp = nsw ADDWri killed %2:gpr32common, 79, 0
+ $w0 = COPY %3:gpr32sp
+ RET_ReallyLR implicit $w0
+...
+---
+name: madd_addxi
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x0, $x1
+
+ ; CHECK-LABEL: name: madd_addxi
+ ; CHECK: liveins: $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
+ ; CHECK-NEXT: [[MOVZXi:%[0-9]+]]:gpr64common = nsw MOVZXi 79, 0
+ ; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64common = nsw MADDXrrr [[COPY1]], [[COPY]], [[MOVZXi]]
+ ; CHECK-NEXT: $x0 = COPY [[MADDXrrr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $x0
+ %0:gpr64 = COPY $x0
+ %1:gpr64 = COPY $x1
+ %2:gpr64common = nsw MADDXrrr %1:gpr64, %0:gpr64, $xzr
+ %3:gpr64sp = nsw ADDXri killed %2:gpr64common, 79, 0
+ $x0 = COPY %3:gpr64sp
+ RET_ReallyLR implicit $x0
+...
+---
+name: madd_subwi
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $w0, $w1
+
+ ; CHECK-LABEL: name: madd_subwi
+ ; CHECK: liveins: $w0, $w1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
+ ; CHECK-NEXT: [[MOVNWi:%[0-9]+]]:gpr32common = nsw MOVNWi 0, 0
+ ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = nsw MADDWrrr [[COPY1]], [[COPY]], [[MOVNWi]]
+ ; CHECK-NEXT: $w0 = COPY [[MADDWrrr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %0:gpr32 = COPY $w0
+ %1:gpr32 = COPY $w1
+ %2:gpr32common = nsw MADDWrrr %1:gpr32, %0:gpr32, $wzr
+ %3:gpr32 = nsw SUBSWri killed %2:gpr32common, 1, 0, implicit-def dead $nzcv
+ $w0 = COPY %3:gpr32
+ RET_ReallyLR implicit $w0
+...
+---
+name: madd_subxi
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x0, $x1
+
+ ; CHECK-LABEL: name: madd_subxi
+ ; CHECK: liveins: $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
+ ; CHECK-NEXT: [[MOVNXi:%[0-9]+]]:gpr64common = nsw MOVNXi 0, 0
+ ; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64 = nsw MADDXrrr [[COPY1]], [[COPY]], [[MOVNXi]]
+ ; CHECK-NEXT: $x0 = COPY [[MADDXrrr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $x0
+ %0:gpr64 = COPY $x0
+ %1:gpr64 = COPY $x1
+ %2:gpr64common = nsw MADDXrrr %1:gpr64, %0:gpr64, $xzr
+ %3:gpr64 = nsw SUBSXri killed %2:gpr64common, 1, 0, implicit-def dead $nzcv
+ $x0 = COPY %3:gpr64
+ RET_ReallyLR implicit $x0
+...
+---
+name: madd_addorwi
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $w0, $w1
+
+ ; CHECK-LABEL: name: madd_addorwi
+ ; CHECK: liveins: $w0, $w1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
+ ; CHECK-NEXT: [[ORRWri:%[0-9]+]]:gpr32common = nsw ORRWri $wzr, 1291
+ ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32common = nsw MADDWrrr [[COPY1]], [[COPY]], [[ORRWri]]
+ ; CHECK-NEXT: $w0 = COPY [[MADDWrrr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %0:gpr32 = COPY $w0
+ %1:gpr32 = COPY $w1
+ %2:gpr32common = nsw MADDWrrr %1:gpr32, %0:gpr32, $wzr
+ %3:gpr32sp = nsw ADDWri killed %2:gpr32common, 4095, 12
+ $w0 = COPY %3:gpr32sp
+ RET_ReallyLR implicit $w0
+...
+---
+name: madd_addorxi
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x0, $x1
+
+ ; CHECK-LABEL: name: madd_addorxi
+ ; CHECK: liveins: $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
+ ; CHECK-NEXT: [[ORRXri:%[0-9]+]]:gpr64common = nsw ORRXri $xzr, 7435
+ ; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64common = nsw MADDXrrr [[COPY1]], [[COPY]], [[ORRXri]]
+ ; CHECK-NEXT: $x0 = COPY [[MADDXrrr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $x0
+ %0:gpr64 = COPY $x0
+ %1:gpr64 = COPY $x1
+ %2:gpr64common = nsw MADDXrrr %1:gpr64, %0:gpr64, $xzr
+ %3:gpr64sp = nsw ADDXri killed %2:gpr64common, 4095, 12
+ $x0 = COPY %3:gpr64sp
+ RET_ReallyLR implicit $x0
+...
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