[llvm] 3a18c09 - [AMDGPU] swizzle-export.ll - regenerate test checks

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-07-08T10:47:38+01:00
New Revision: 3a18c0910e1b693d21b68025f88d95536227f708

URL: https://github.com/llvm/llvm-project/commit/3a18c0910e1b693d21b68025f88d95536227f708
DIFF: https://github.com/llvm/llvm-project/commit/3a18c0910e1b693d21b68025f88d95536227f708.diff

LOG: [AMDGPU] swizzle-export.ll - regenerate test checks

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/swizzle-export.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/swizzle-export.ll b/llvm/test/CodeGen/AMDGPU/swizzle-export.ll
index 8d5b6568340db..d35e05e003952 100644
--- a/llvm/test/CodeGen/AMDGPU/swizzle-export.ll
+++ b/llvm/test/CodeGen/AMDGPU/swizzle-export.ll
@@ -1,12 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
 
-;EG: {{^}}main:
-;EG: EXPORT T{{[0-9]+}}.XYXX
-;EG: EXPORT T{{[0-9]+}}.ZXXX
-;EG: EXPORT T{{[0-9]+}}.XXWX
-;EG: EXPORT T{{[0-9]+}}.XXXW
-
 define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {
+; EG-LABEL: main:
+; EG:       ; %bb.0: ; %main_body
+; EG-NEXT:    CALL_FS
+; EG-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
+; EG-NEXT:    EXPORT T1.XYZW
+; EG-NEXT:    EXPORT T0.XYXX
+; EG-NEXT:    EXPORT T0.ZXXX
+; EG-NEXT:    EXPORT T0.XXWX
+; EG-NEXT:    EXPORT T0.XXXW
+; EG-NEXT:    CF_END
+; EG-NEXT:    ALU clause starting at 8:
+; EG-NEXT:     MOV * T0.W, KC0[0].X,
+; EG-NEXT:     MUL_IEEE T0.X, KC0[0].X, 0.0,
+; EG-NEXT:     MUL_IEEE T0.Y, KC0[0].Y, KC0[0].X,
+; EG-NEXT:     MUL_IEEE * T0.Z, KC0[0].Z, KC0[0].X,
 main_body:
   %0 = extractelement <4 x float> %reg1, i32 0
   %1 = extractelement <4 x float> %reg1, i32 1
@@ -92,11 +102,28 @@ main_body:
   ret void
 }
 
-; EG: {{^}}main2:
-; EG: T{{[0-9]+}}.XY__
-; EG: T{{[0-9]+}}.ZXY0
-
 define amdgpu_vs void @main2(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {
+; EG-LABEL: main2:
+; EG:       ; %bb.0: ; %main_body
+; EG-NEXT:    CALL_FS
+; EG-NEXT:    ALU 11, @6, KC0[CB0:0-32], KC1[]
+; EG-NEXT:    EXPORT T1.XY__
+; EG-NEXT:    EXPORT T0.ZXY0
+; EG-NEXT:    CF_END
+; EG-NEXT:    PAD
+; EG-NEXT:    ALU clause starting at 6:
+; EG-NEXT:     MULADD_IEEE * T0.W, KC0[1].X, literal.x, 0.5,
+; EG-NEXT:    1042479491(1.591549e-01), 0(0.000000e+00)
+; EG-NEXT:     FRACT * T0.W, PV.W,
+; EG-NEXT:     ADD * T0.W, PV.W, literal.x,
+; EG-NEXT:    -1090519040(-5.000000e-01), 0(0.000000e+00)
+; EG-NEXT:     COS * T0.Z, PV.W,
+; EG-NEXT:     ADD T1.X, T1.X, literal.x,
+; EG-NEXT:     MOV T0.Y, KC0[0].Y,
+; EG-NEXT:     MOV * T0.X, KC0[0].X,
+; EG-NEXT:    1075838976(2.500000e+00), 0(0.000000e+00)
+; EG-NEXT:     MUL_IEEE * T1.Y, T1.Y, literal.x,
+; EG-NEXT:    1080033280(3.500000e+00), 0(0.000000e+00)
 main_body:
   %0 = extractelement <4 x float> %reg1, i32 0
   %1 = extractelement <4 x float> %reg1, i32 1