[llvm] relaxed simd fma (PR #147487)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,43 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+
+; RUN: llc < %s -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers  -mattr=+simd128,+relaxed-simd | FileCheck %s
+target triple = "wasm32"
+define void @fma_seperate(ptr %a, ptr %b, ptr %c, ptr %dest) {
+; CHECK-LABEL: fma_seperate:
+; CHECK:         .functype fma_seperate (i32, i32, i32, i32) -> ()
+; CHECK-NEXT:  # %bb.0: # %entry
+; CHECK-NEXT:    v128.load $push2=, 0($2):p2align=0
+; CHECK-NEXT:    v128.load $push1=, 0($1):p2align=0
+; CHECK-NEXT:    v128.load $push0=, 0($0):p2align=0
+; CHECK-NEXT:    f32x4.relaxed_madd $push3=, $pop2, $pop1, $pop0
+; CHECK-NEXT:    v128.store 0($3):p2align=0, $pop3
+; CHECK-NEXT:    return
+entry:
+  %0 = load <4 x float>, ptr %a, align 1
+  %1 = load <4 x float>, ptr %b, align 1
+  %2 = load <4 x float>, ptr %c, align 1
+  %mul.i = fmul fast <4 x float> %1, %0
+  %add.i = fadd fast <4 x float> %mul.i, %2
+  store <4 x float> %add.i, ptr %dest, align 1
+  ret void
+}
+
+; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite)
+define void @fma_llvm(ptr %a, ptr %b, ptr %c, ptr %dest) {
+; CHECK-LABEL: fma_llvm:
+; CHECK:         .functype fma_llvm (i32, i32, i32, i32) -> ()
+; CHECK-NEXT:  # %bb.0: # %entry
+; CHECK-NEXT:    v128.load $push2=, 0($0):p2align=0
+; CHECK-NEXT:    v128.load $push1=, 0($1):p2align=0
+; CHECK-NEXT:    v128.load $push0=, 0($2):p2align=0
+; CHECK-NEXT:    f32x4.relaxed_madd $push3=, $pop2, $pop1, $pop0
+; CHECK-NEXT:    v128.store 0($3):p2align=0, $pop3
+; CHECK-NEXT:    return
+entry:
+  %0 = load <4 x float>, ptr %a, align 1
+  %1 = load <4 x float>, ptr %b, align 1
+  %2 = load <4 x float>, ptr %c, align 1
+  %fma = tail call fast <4 x float> @llvm.fma.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
+  store <4 x float> %fma, ptr %dest, align 1
+  ret void
+}
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arsenm wrote:

Test scalar cases and other vector widths 

https://github.com/llvm/llvm-project/pull/147487