[llvm] 599b9de - [AArch64] sve-vscale.ll - cleanup test checks
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 7 07:50:40 PDT 2025
Author: Simon Pilgrim
Date: 2025-07-07T15:50:26+01:00
New Revision: 599b9def29a841173cb4b748a07523a933b30ea9
URL: https://github.com/llvm/llvm-project/commit/599b9def29a841173cb4b748a07523a933b30ea9
DIFF: https://github.com/llvm/llvm-project/commit/599b9def29a841173cb4b748a07523a933b30ea9.diff
LOG: [AArch64] sve-vscale.ll - cleanup test checks
- Use -passes="" so its correctly handed in DOS batch scripts
- Move CHECKs inside tests to reduce regeneration diff when the update script can properly handle -asm-verbose=0
Added:
Modified:
llvm/test/CodeGen/AArch64/sve-vscale.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/sve-vscale.ll b/llvm/test/CodeGen/AArch64/sve-vscale.ll
index 7214c98cc3186..173652630bf1b 100644
--- a/llvm/test/CodeGen/AArch64/sve-vscale.ll
+++ b/llvm/test/CodeGen/AArch64/sve-vscale.ll
@@ -1,50 +1,50 @@
; RUN: llc -mtriple aarch64 -mattr=+sve -asm-verbose=0 < %s | FileCheck %s
-; RUN: opt -mtriple=aarch64 -passes='require<profile-summary>,function(codegenprepare)' -S < %s | llc -mtriple=aarch64 -mattr=+sve -asm-verbose=0 | FileCheck %s
+; RUN: opt -mtriple=aarch64 -passes="require<profile-summary>,function(codegenprepare)" -S < %s | llc -mtriple=aarch64 -mattr=+sve -asm-verbose=0 | FileCheck %s
;
; RDVL
;
+define i8 @rdvl_i8() nounwind {
; CHECK-LABEL: rdvl_i8:
; CHECK: rdvl x0, #1
; CHECK-NEXT: ret
-define i8 @rdvl_i8() nounwind {
%vscale = call i8 @llvm.vscale.i8()
%1 = mul nsw i8 %vscale, 16
ret i8 %1
}
+define i16 @rdvl_i16() nounwind {
; CHECK-LABEL: rdvl_i16:
; CHECK: rdvl x0, #1
; CHECK-NEXT: ret
-define i16 @rdvl_i16() nounwind {
%vscale = call i16 @llvm.vscale.i16()
%1 = mul nsw i16 %vscale, 16
ret i16 %1
}
+define i32 @rdvl_i32() nounwind {
; CHECK-LABEL: rdvl_i32:
; CHECK: rdvl x0, #1
; CHECK-NEXT: ret
-define i32 @rdvl_i32() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, 16
ret i32 %1
}
+define i64 @rdvl_i64() nounwind {
; CHECK-LABEL: rdvl_i64:
; CHECK: rdvl x0, #1
; CHECK-NEXT: ret
-define i64 @rdvl_i64() nounwind {
%vscale = call i64 @llvm.vscale.i64()
%1 = mul nsw i64 %vscale, 16
ret i64 %1
}
+define i32 @rdvl_const() nounwind {
; CHECK-LABEL: rdvl_const:
; CHECK: rdvl x0, #1
; CHECK-NEXT: ret
-define i32 @rdvl_const() nounwind {
%vscale.ptr = getelementptr <vscale x 1 x i8>, ptr null, i64 1
%vscale.int = ptrtoint ptr %vscale.ptr to i32
%vscale.scaled = mul nsw i32 %vscale.int, 16
@@ -70,32 +70,31 @@ define i32 @vscale_neg1() nounwind {
ret i32 %neg
}
+define i32 @rdvl_3() nounwind {
; CHECK-LABEL: rdvl_3:
; CHECK: rdvl [[VL_B:x[0-9]+]], #1
; CHECK-NEXT: mov w[[MUL:[0-9]+]], #3
; CHECK-NEXT: lsr [[VL_Q:x[0-9]+]], [[VL_B]], #4
; CHECK-NEXT: mul x0, [[VL_Q]], x[[MUL]]
; CHECK-NEXT: ret
-define i32 @rdvl_3() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, 3
ret i32 %1
}
-
+define i32 @rdvl_min() nounwind {
; CHECK-LABEL: rdvl_min:
; CHECK: rdvl x0, #-32
; CHECK-NEXT: ret
-define i32 @rdvl_min() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, -512
ret i32 %1
}
+define i32 @rdvl_max() nounwind {
; CHECK-LABEL: rdvl_max:
; CHECK: rdvl x0, #31
; CHECK-NEXT: ret
-define i32 @rdvl_max() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, 496
ret i32 %1
@@ -116,29 +115,29 @@ define i1 @rdvl_i1() {
; CNTH
;
+define i32 @cnth() nounwind {
; CHECK-LABEL: cnth:
; CHECK: cnth x0{{$}}
; CHECK-NEXT: ret
-define i32 @cnth() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = shl nsw i32 %vscale, 3
ret i32 %1
}
+define i32 @cnth_max() nounwind {
; CHECK-LABEL: cnth_max:
; CHECK: cnth x0, all, mul #15
; CHECK-NEXT: ret
-define i32 @cnth_max() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, 120
ret i32 %1
}
+define i32 @cnth_neg() nounwind {
; CHECK-LABEL: cnth_neg:
; CHECK: cnth [[CNT:x[0-9]+]]
; CHECK: neg x0, [[CNT]]
; CHECK-NEXT: ret
-define i32 @cnth_neg() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, -8
ret i32 %1
@@ -148,29 +147,29 @@ define i32 @cnth_neg() nounwind {
; CNTW
;
+define i32 @cntw() nounwind {
; CHECK-LABEL: cntw:
; CHECK: cntw x0{{$}}
; CHECK-NEXT: ret
-define i32 @cntw() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = shl nsw i32 %vscale, 2
ret i32 %1
}
+define i32 @cntw_max() nounwind {
; CHECK-LABEL: cntw_max:
; CHECK: cntw x0, all, mul #15
; CHECK-NEXT: ret
-define i32 @cntw_max() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, 60
ret i32 %1
}
+define i32 @cntw_neg() nounwind {
; CHECK-LABEL: cntw_neg:
; CHECK: cntw [[CNT:x[0-9]+]]
; CHECK: neg x0, [[CNT]]
; CHECK-NEXT: ret
-define i32 @cntw_neg() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, -4
ret i32 %1
@@ -180,29 +179,29 @@ define i32 @cntw_neg() nounwind {
; CNTD
;
+define i32 @cntd() nounwind {
; CHECK-LABEL: cntd:
; CHECK: cntd x0{{$}}
; CHECK-NEXT: ret
-define i32 @cntd() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = shl nsw i32 %vscale, 1
ret i32 %1
}
+define i32 @cntd_max() nounwind {
; CHECK-LABEL: cntd_max:
; CHECK: cntd x0, all, mul #15
; CHECK-NEXT: ret
-define i32 @cntd_max() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, 30
ret i32 %1
}
+define i32 @cntd_neg() nounwind {
; CHECK-LABEL: cntd_neg:
; CHECK: cntd [[CNT:x[0-9]+]]
; CHECK: neg x0, [[CNT]]
; CHECK-NEXT: ret
-define i32 @cntd_neg() nounwind {
%vscale = call i32 @llvm.vscale.i32()
%1 = mul nsw i32 %vscale, -2
ret i32 %1
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