[llvm] [AArch64] Extend performActiveLaneMaskCombine for more than two extracts (PR #146725)

[Paul Walker via llvm-commits]

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@@ -18143,53 +18143,63 @@ performActiveLaneMaskCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
       (!ST->hasSVE2p1() && !(ST->hasSME2() && ST->isStreaming())))
     return SDValue();
 
-  if (!N->hasNUsesOfValue(2, 0))
+  unsigned NumUses = N->use_size();
+  unsigned MaskMinElts = N->getValueType(0).getVectorMinNumElements();
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paulwalker-arm wrote:

Please can you try to reduce the usage of getVectorMinNumElements()? In this instance you can use `isKnownMultipleOf()` and `divideCoefficientBy()` so the code is not, or at least not as, specific to scalable vectors.

https://github.com/llvm/llvm-project/pull/146725