[llvm] [VPlan] Connect (MemRuntime|SCEV)Check blocks as VPlan transform (NFC). (PR #143879)
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Sat Jul 5 12:25:02 PDT 2025
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@@ -2025,57 +2005,30 @@ class GeneratedRTChecks {
/// Adds the generated SCEVCheckBlock before \p LoopVectorPreHeader and
/// adjusts the branches to branch to the vector preheader or \p Bypass,
/// depending on the generated condition.
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ayalz wrote:
```suggestion
/// Retrieves the SCEVCheckCond and SCEVCheckBlock that were generated as IR outside VPlan.
```
https://github.com/llvm/llvm-project/pull/143879
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