[llvm] [AArch64] Remove redundant FMOV for zero-extended i32/i16 loads to f64 (PR #146920)

[David Green via llvm-commits]

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@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
+
+define double @_Z9load_u64_from_u32_testPj(ptr %n) {
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davemgreen wrote:

They can probably be part of the same test file (and if you wanted to add tablegen patterns for all the types that would help keep them consistent). Otherwise this is looking good to me.

https://github.com/llvm/llvm-project/pull/146920