[llvm] eb84af4 - AArch64MCCodeEmitter: Set PCRel at fixup creation

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2025-07-04T15:15:29-07:00
New Revision: eb84af49a1bfd6795b63f46588ab733920c4e43f

URL: https://github.com/llvm/llvm-project/commit/eb84af49a1bfd6795b63f46588ab733920c4e43f
DIFF: https://github.com/llvm/llvm-project/commit/eb84af49a1bfd6795b63f46588ab733920c4e43f.diff

LOG: AArch64MCCodeEmitter: Set PCRel at fixup creation

Avoid reliance on the MCAssembler::evaluateFixup workaround checking
MCFixupKindInfo::FKF_IsPCRel. Remove discouraged MCFixupKind uses.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
index 7e93e5be30641..45e8949809da9 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
@@ -269,14 +269,11 @@ AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
   assert(MO.isExpr() && "Unexpected target type!");
   const MCExpr *Expr = MO.getExpr();
 
-  MCFixupKind Kind = MI.getOpcode() == AArch64::ADR
-                         ? MCFixupKind(AArch64::fixup_aarch64_pcrel_adr_imm21)
-                         : MCFixupKind(AArch64::fixup_aarch64_pcrel_adrp_imm21);
-  Fixups.push_back(MCFixup::create(0, Expr, Kind));
-
+  unsigned Kind = MI.getOpcode() == AArch64::ADR
+                      ? AArch64::fixup_aarch64_pcrel_adr_imm21
+                      : AArch64::fixup_aarch64_pcrel_adrp_imm21;
+  Fixups.push_back(MCFixup::create(0, Expr, Kind, true));
   MCNumFixups += 1;
-
-  // All of the information is in the fixup.
   return 0;
 }
 
@@ -329,12 +326,9 @@ uint32_t AArch64MCCodeEmitter::getCondBranchTargetOpValue(
     return MO.getImm();
   assert(MO.isExpr() && "Unexpected target type!");
 
-  MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch19);
-  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
-
+  Fixups.push_back(MCFixup::create(
+      0, MO.getExpr(), AArch64::fixup_aarch64_pcrel_branch19, true));
   ++MCNumFixups;
-
-  // All of the information is in the fixup.
   return 0;
 }
 
@@ -350,12 +344,9 @@ uint32_t AArch64MCCodeEmitter::getCondCompBranchTargetOpValue(
     return MO.getImm();
   assert(MO.isExpr() && "Unexpected target type!");
 
-  MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch9);
-  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
-
+  Fixups.push_back(MCFixup::create(0, MO.getExpr(),
+                                   AArch64::fixup_aarch64_pcrel_branch9, true));
   ++MCNumFixups;
-
-  // All of the information is in the fixup.
   return 0;
 }
 
@@ -373,12 +364,9 @@ AArch64MCCodeEmitter::getPAuthPCRelOpValue(const MCInst &MI, unsigned OpIdx,
     return -(MO.getImm());
   assert(MO.isExpr() && "Unexpected target type!");
 
-  MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch16);
-  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
-
+  Fixups.push_back(MCFixup::create(
+      0, MO.getExpr(), AArch64::fixup_aarch64_pcrel_branch16, true));
   ++MCNumFixups;
-
-  // All of the information is in the fixup.
   return 0;
 }
 
@@ -395,12 +383,9 @@ AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx,
     return MO.getImm();
   assert(MO.isExpr() && "Unexpected target type!");
 
-  MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_ldr_pcrel_imm19);
-  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
-
+  Fixups.push_back(MCFixup::create(
+      0, MO.getExpr(), AArch64::fixup_aarch64_ldr_pcrel_imm19, true));
   ++MCNumFixups;
-
-  // All of the information is in the fixup.
   return 0;
 }
 
@@ -443,12 +428,9 @@ uint32_t AArch64MCCodeEmitter::getTestBranchTargetOpValue(
     return MO.getImm();
   assert(MO.isExpr() && "Unexpected ADR target type!");
 
-  MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch14);
-  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
-
+  Fixups.push_back(MCFixup::create(
+      0, MO.getExpr(), AArch64::fixup_aarch64_pcrel_branch14, true));
   ++MCNumFixups;
-
-  // All of the information is in the fixup.
   return 0;
 }
 
@@ -465,10 +447,10 @@ AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
     return MO.getImm();
   assert(MO.isExpr() && "Unexpected ADR target type!");
 
-  MCFixupKind Kind = MI.getOpcode() == AArch64::BL
-                         ? MCFixupKind(AArch64::fixup_aarch64_pcrel_call26)
-                         : MCFixupKind(AArch64::fixup_aarch64_pcrel_branch26);
-  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
+  unsigned Kind = MI.getOpcode() == AArch64::BL
+                      ? AArch64::fixup_aarch64_pcrel_call26
+                      : AArch64::fixup_aarch64_pcrel_branch26;
+  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, true));
 
   ++MCNumFixups;