[llvm] ec752c6 - [LoongArch] Pre-commit tests for optimizing insert bitcast fp element

[Qi Zhao via llvm-commits]

Author: Qi Zhao
Date: 2025-07-04T19:11:33+08:00
New Revision: ec752c67669fb88984bd606364f08910d4f84c75

URL: https://github.com/llvm/llvm-project/commit/ec752c67669fb88984bd606364f08910d4f84c75
DIFF: https://github.com/llvm/llvm-project/commit/ec752c67669fb88984bd606364f08910d4f84c75.diff

LOG: [LoongArch] Pre-commit tests for optimizing insert bitcast fp element

Added: 
    llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-bitcast-element.ll
    llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-bitcast-element.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-bitcast-element.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-bitcast-element.ll
new file mode 100644
index 0000000000000..7b2461b11f12d
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-bitcast-element.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
+
+define <8 x float> @insert_bitcast_v8f32(<8 x float> %a, i32 %b) nounwind {
+; CHECK-LABEL: insert_bitcast_v8f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movgr2fr.w $fa1, $a0
+; CHECK-NEXT:    movfr2gr.s $a0, $fa1
+; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a0, 1
+; CHECK-NEXT:    ret
+entry:
+  %c = bitcast i32 %b to float
+  %d = insertelement <8 x float> %a, float %c, i32 1
+  ret <8 x float> %d
+}
+
+define <4 x double> @insert_bitcast_v4f64(<4 x double> %a, i64 %b) nounwind {
+; CHECK-LABEL: insert_bitcast_v4f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movgr2fr.d $fa1, $a0
+; CHECK-NEXT:    movfr2gr.d $a0, $fa1
+; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a0, 1
+; CHECK-NEXT:    ret
+entry:
+  %c = bitcast i64 %b to double
+  %d = insertelement <4 x double> %a, double %c, i32 1
+  ret <4 x double> %d
+}

diff  --git a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-bitcast-element.ll b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-bitcast-element.ll
new file mode 100644
index 0000000000000..a20d17efdfb11
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-bitcast-element.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
+
+define <4 x float> @insert_bitcast_v4f32(<4 x float> %a, i32 %b) nounwind {
+; CHECK-LABEL: insert_bitcast_v4f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movgr2fr.w $fa1, $a0
+; CHECK-NEXT:    movfr2gr.s $a0, $fa1
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a0, 1
+; CHECK-NEXT:    ret
+entry:
+  %c = bitcast i32 %b to float
+  %d = insertelement <4 x float> %a, float %c, i32 1
+  ret <4 x float> %d
+}
+
+define <2 x double> @insert_bitcast_v2f64(<2 x double> %a, i64 %b) nounwind {
+; CHECK-LABEL: insert_bitcast_v2f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movgr2fr.d $fa1, $a0
+; CHECK-NEXT:    movfr2gr.d $a0, $fa1
+; CHECK-NEXT:    vinsgr2vr.d $vr0, $a0, 1
+; CHECK-NEXT:    ret
+entry:
+  %c = bitcast i64 %b to double
+  %d = insertelement <2 x double> %a, double %c, i32 1
+  ret <2 x double> %d
+}