[llvm] [AArch64] Remove redundant fmov instruction in i32 load, zero-extension to i64 and bitcast to f64 (PR #146920)

[Amina Chabane via llvm-commits]

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@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
+
+define double @_Z9load_u64_from_u32_testPj(ptr %n) {
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Amichaxx wrote:

Yes, will get to adding these today. Thanks.

https://github.com/llvm/llvm-project/pull/146920