[llvm] [RISCV] AddEdge between first mask producer and user of V0 (PR #146855)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 3 20:01:10 PDT 2025
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@@ -68,11 +68,33 @@ class RISCVVectorMaskDAGMutation : public ScheduleDAGMutation {
void apply(ScheduleDAGInstrs *DAG) override {
SUnit *NearestUseV0SU = nullptr;
+ SmallVector<SUnit *, 8> DefMask;
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wangpc-pp wrote:
The size of this vector won't exceed 2? So I think we can reduce 8 to 2.
https://github.com/llvm/llvm-project/pull/146855
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