[llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)

[Akshay Deodhar via llvm-commits]

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@@ -2045,9 +2099,9 @@ multiclass ATOM2_incdec_impl<string OpStr> {
 
 // atom.cas
 multiclass ATOM3_cas_impl<string OpStr> {
-  defm _b16 : ATOM3S_impl<OpStr, "i", "b16", I16RT, []>;
-  defm _b32 : ATOM3S_impl<OpStr, "i", "b32", I32RT, []>;
-  defm _b64 : ATOM3S_impl<OpStr, "i", "b64", I64RT, []>;
+  defm _b16 : F_ATOMIC_3_INTRINSIC_PATTERN<I16RT, OpStr, "INT_PTX_ATOM_CAS_16", "i">;
+  defm _b32 : F_ATOMIC_3_INTRINSIC_PATTERN<I32RT, OpStr, "INT_PTX_ATOM_CAS_32", "i">;
+  defm _b64 : F_ATOMIC_3_INTRINSIC_PATTERN<I64RT, OpStr, "INT_PTX_ATOM_CAS_64", "i">;
 }
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akshayrdeodhar wrote:

There is only one atomic instruction in PTX which takes 3 operands, so possibly yes. Having the multiclass makes CAS as an *instance* of an atomic 3-operand instruction. (and this is how things were implemented earlier)

https://github.com/llvm/llvm-project/pull/140812