[llvm] [RISCV][VLOPT] Add support for vfrec7.v (PR #146918)

Mikhail R. Gadelha via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 3 09:05:22 PDT 2025


https://github.com/mikhailramalho created https://github.com/llvm/llvm-project/pull/146918

Add support for the vfrec7.v instruction in the RISC-V VLOptimizer. 

This patch was motivated by the list of missing instructions shared on PR #146692.


>From f873f1ef9e72b413f95d467340148e55fa387233 Mon Sep 17 00:00:00 2001
From: "Mikhail R. Gadelha" <mikhail at igalia.com>
Date: Wed, 2 Jul 2025 13:16:29 -0300
Subject: [PATCH] Add vfrec7.v

Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
---
 llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp   | 2 ++
 llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll | 3 +--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
index 1dd12ab396fd8..04709102fbffd 100644
--- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
@@ -1103,6 +1103,8 @@ static bool isSupportedInstr(const MachineInstr &MI) {
   case RISCV::VFSQRT_V:
   // Vector Floating-Point Reciprocal Square-Root Estimate Instruction
   case RISCV::VFRSQRT7_V:
+  // Vector Floating-Point Reciprocal Estimate Instruction
+  case RISCV::VFREC7_V:
   // Vector Floating-Point MIN/MAX Instructions
   case RISCV::VFMIN_VF:
   case RISCV::VFMIN_VV:
diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
index 4c15d8e3e7c2f..92dd55911e9d4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
@@ -5338,12 +5338,11 @@ define <vscale x 4 x double> @vfrec7(<vscale x 4 x float> %a) {
 ;
 ; VLOPT-LABEL: vfrec7:
 ; VLOPT:       # %bb.0:
-; VLOPT-NEXT:    vsetivli zero, 7, e32, m2, ta, ma
+; VLOPT-NEXT:    vsetivli zero, 6, e32, m2, ta, ma
 ; VLOPT-NEXT:    vmv2r.v v12, v8
 ; VLOPT-NEXT:    fsrmi a0, 0
 ; VLOPT-NEXT:    vfrec7.v v14, v8
 ; VLOPT-NEXT:    fsrm a0
-; VLOPT-NEXT:    vsetivli zero, 6, e32, m2, ta, ma
 ; VLOPT-NEXT:    vfwmacc.vv v8, v12, v14
 ; VLOPT-NEXT:    ret
   %1 = call <vscale x 4 x float> @llvm.riscv.vfrec7.nxv4f32(<vscale x 4 x float> poison, <vscale x 4 x float> %a, iXLen 0, iXLen 7)



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