[llvm] 21c4fbd - [RISCV][VLOPT] Pre-commit test for adding support for vfrec7.v
Mikhail R. Gadelha via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 3 08:51:08 PDT 2025
Author: Mikhail R. Gadelha
Date: 2025-07-03T12:50:59-03:00
New Revision: 21c4fbd4235a964e87c10b1008c61f9a2e6eb9a9
URL: https://github.com/llvm/llvm-project/commit/21c4fbd4235a964e87c10b1008c61f9a2e6eb9a9
DIFF: https://github.com/llvm/llvm-project/commit/21c4fbd4235a964e87c10b1008c61f9a2e6eb9a9.diff
LOG: [RISCV][VLOPT] Pre-commit test for adding support for vfrec7.v
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
Added:
Modified:
llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
index e6407b322c447..4c15d8e3e7c2f 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
@@ -5323,3 +5323,30 @@ define <vscale x 4 x double> @vfrsqrt7(<vscale x 4 x float> %a) {
%2 = call <vscale x 4 x double> @llvm.riscv.vfwmacc(<vscale x 4 x double> poison, <vscale x 4 x float> %a, <vscale x 4 x float> %1, iXLen 7, iXLen 6, iXLen 0)
ret <vscale x 4 x double> %2
}
+
+define <vscale x 4 x double> @vfrec7(<vscale x 4 x float> %a) {
+; NOVLOPT-LABEL: vfrec7:
+; NOVLOPT: # %bb.0:
+; NOVLOPT-NEXT: vsetivli zero, 7, e32, m2, ta, ma
+; NOVLOPT-NEXT: vmv2r.v v12, v8
+; NOVLOPT-NEXT: fsrmi a0, 0
+; NOVLOPT-NEXT: vfrec7.v v14, v8
+; NOVLOPT-NEXT: fsrm a0
+; NOVLOPT-NEXT: vsetivli zero, 6, e32, m2, ta, ma
+; NOVLOPT-NEXT: vfwmacc.vv v8, v12, v14
+; NOVLOPT-NEXT: ret
+;
+; VLOPT-LABEL: vfrec7:
+; VLOPT: # %bb.0:
+; VLOPT-NEXT: vsetivli zero, 7, e32, m2, ta, ma
+; VLOPT-NEXT: vmv2r.v v12, v8
+; VLOPT-NEXT: fsrmi a0, 0
+; VLOPT-NEXT: vfrec7.v v14, v8
+; VLOPT-NEXT: fsrm a0
+; VLOPT-NEXT: vsetivli zero, 6, e32, m2, ta, ma
+; VLOPT-NEXT: vfwmacc.vv v8, v12, v14
+; VLOPT-NEXT: ret
+ %1 = call <vscale x 4 x float> @llvm.riscv.vfrec7.nxv4f32(<vscale x 4 x float> poison, <vscale x 4 x float> %a, iXLen 0, iXLen 7)
+ %2 = call <vscale x 4 x double> @llvm.riscv.vfwmacc(<vscale x 4 x double> poison, <vscale x 4 x float> %a, <vscale x 4 x float> %1, iXLen 7, iXLen 6, iXLen 0)
+ ret <vscale x 4 x double> %2
+}
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