[llvm] [NFC][LoopFuse] Regenerate LoopFusion tests using UTC (PR #146902)
Madhur Amilkanthwar via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 3 08:02:36 PDT 2025
https://github.com/madhur13490 updated https://github.com/llvm/llvm-project/pull/146902
>From 319430876af426af5f881d5cb7e5e452c360d31f Mon Sep 17 00:00:00 2001
From: Madhur Amilkanthwar <madhura at nvidia.com>
Date: Wed, 2 Jul 2025 09:15:35 -0700
Subject: [PATCH] [NFC] Regenerate LoopFusion tests using UTC
---
.../LoopFusion/diagnostics_missed.ll | 3 +
.../double_loop_nest_inner_guard.ll | 66 ++++++---
llvm/test/Transforms/LoopFusion/four_loops.ll | 85 +++++++++--
.../Transforms/LoopFusion/guarded_peel.ll | 93 ++++++++----
.../LoopFusion/guarded_unsafeblock_peel.ll | 55 +++++---
.../Transforms/LoopFusion/hoist_preheader.ll | 25 +++-
.../test/Transforms/LoopFusion/inner_loops.ll | 72 +++++++---
llvm/test/Transforms/LoopFusion/loop_nest.ll | 68 ++++++---
.../Transforms/LoopFusion/nonadjacent_peel.ll | 67 ++++++---
llvm/test/Transforms/LoopFusion/peel.ll | 132 +++++++++++++-----
.../Transforms/LoopFusion/sink_preheader.ll | 20 +--
.../triple_loop_nest_inner_guard.ll | 90 ++++++++----
12 files changed, 570 insertions(+), 206 deletions(-)
diff --git a/llvm/test/Transforms/LoopFusion/diagnostics_missed.ll b/llvm/test/Transforms/LoopFusion/diagnostics_missed.ll
index f30a070153742..ad649c9442319 100644
--- a/llvm/test/Transforms/LoopFusion/diagnostics_missed.ll
+++ b/llvm/test/Transforms/LoopFusion/diagnostics_missed.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion -pass-remarks-missed=loop-fusion -disable-output < %s 2>&1 | FileCheck %s
; REQUIRES: asserts
@@ -395,3 +396,5 @@ attributes #0 = { nounwind readnone speculatable willreturn }
!84 = distinct !DISubprogram(name: "unsafe_guardblock", scope: !3, file: !3, line: 70, type: !15, scopeLine: 60, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !2, retainedNodes: !78)
!85 = distinct !DILexicalBlock(scope: !84, file: !3, line: 3, column: 5)
!86 = !DILocation(line: 72, column: 3, scope: !85)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll b/llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
index f6eab83b5d154..658e60f5c0032 100644
--- a/llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
+++ b/llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s 2>&1 | FileCheck %s
; Verify that LoopFusion can fuse two double-loop nests with guarded inner
@@ -7,19 +8,10 @@
@b = common global [10 x [10 x i32]] zeroinitializer
@c = common global [10 x [10 x i32]] zeroinitializer
-; CHECK-LABEL: @double_loop_nest_inner_guard
-; CHECK: br i1 %{{.*}}, label %[[OUTER_PH:outer1.ph]], label %[[FUNC_EXIT:func_exit]]
-; CHECK: [[OUTER_PH]]:
-; CHECK: br label %[[OUTER_BODY_INNER_GUARD:outer1.body.inner.guard]]
-; CHECK: [[OUTER_BODY_INNER_GUARD]]:
-; CHECK: br i1 %{{.*}}, label %[[INNER_PH:inner1.ph]], label %[[OUTER_LATCH:outer2.latch]]
-; CHECK: [[INNER_PH]]:
-; CHECK-NEXT: br label %[[INNER_BODY:inner1.body]]
-; CHECK: [[INNER_BODY]]:
; First loop body.
; CHECK: load
; CHECK: add
@@ -28,21 +20,59 @@
; CHECK: load
; CHECK: mul
; CHECK: store
-; CHECK: br i1 %{{.*}}, label %[[INNER_EXIT:inner2.exit]], label %[[INNER_BODY:inner1.body]]
-; CHECK: [[INNER_EXIT]]:
-; CHECK-NEXT: br label %[[OUTER_LATCH:outer2.latch]]
-; CHECK: [[OUTER_LATCH]]:
-; CHECK: br i1 %{{.*}}, label %[[OUTER_EXIT:outer2.exit]], label %[[OUTER_BODY_INNER_GUARD]]
-; CHECK: [[OUTER_EXIT]]:
-; CHECK-NEXT: br label %[[FUNC_EXIT:func_exit]]
-; CHECK: [[FUNC_EXIT]]:
-; CHECK-NEXT: ret
define i32 @double_loop_nest_inner_guard(i32 %m, i32 %n, i32 %M, i32 %N) {
+; CHECK-LABEL: define i32 @double_loop_nest_inner_guard(
+; CHECK-SAME: i32 [[M:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[CMP63:%.*]] = icmp sgt i32 [[M]], 0
+; CHECK-NEXT: br i1 [[CMP63]], label %[[OUTER1_PH:.*]], label %[[FUNC_EXIT:.*]]
+; CHECK: [[OUTER1_PH]]:
+; CHECK-NEXT: [[CMP261:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: [[WIDE_TRIP_COUNT76:%.*]] = zext i32 [[M]] to i64
+; CHECK-NEXT: [[WIDE_TRIP_COUNT72:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: br label %[[OUTER1_BODY_INNER_GUARD:.*]]
+; CHECK: [[OUTER1_BODY_INNER_GUARD]]:
+; CHECK-NEXT: [[IV74:%.*]] = phi i64 [ 0, %[[OUTER1_PH]] ], [ [[IV_NEXT75:%.*]], %[[OUTER2_LATCH:.*]] ]
+; CHECK-NEXT: [[IV66:%.*]] = phi i64 [ [[IV_NEXT67:%.*]], %[[OUTER2_LATCH]] ], [ 0, %[[OUTER1_PH]] ]
+; CHECK-NEXT: br i1 [[CMP261]], label %[[INNER1_PH:.*]], label %[[OUTER2_LATCH]]
+; CHECK: [[INNER1_PH]]:
+; CHECK-NEXT: br label %[[INNER1_BODY:.*]]
+; CHECK: [[INNER1_BODY]]:
+; CHECK-NEXT: [[IV70:%.*]] = phi i64 [ [[IV_NEXT71:%.*]], %[[INNER1_BODY]] ], [ 0, %[[INNER1_PH]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[INNER1_BODY]] ], [ 0, %[[INNER1_PH]] ]
+; CHECK-NEXT: [[IDX6:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr @a, i64 0, i64 [[IV74]], i64 [[IV70]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IDX6]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 2
+; CHECK-NEXT: [[IDX10:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr @b, i64 0, i64 [[IV74]], i64 [[IV70]]
+; CHECK-NEXT: store i32 [[ADD]], ptr [[IDX10]], align 4
+; CHECK-NEXT: [[IV_NEXT71]] = add nuw nsw i64 [[IV70]], 1
+; CHECK-NEXT: [[EXITCOND73:%.*]] = icmp eq i64 [[IV_NEXT71]], [[WIDE_TRIP_COUNT72]]
+; CHECK-NEXT: [[IDX27:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr @a, i64 0, i64 [[IV66]], i64 [[IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[IDX27]], align 4
+; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[TMP1]], 1
+; CHECK-NEXT: [[IDX31:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr @c, i64 0, i64 [[IV66]], i64 [[IV]]
+; CHECK-NEXT: store i32 [[MUL]], ptr [[IDX31]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], [[WIDE_TRIP_COUNT72]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[INNER2_EXIT:.*]], label %[[INNER1_BODY]]
+; CHECK: [[INNER2_EXIT]]:
+; CHECK-NEXT: br label %[[OUTER2_LATCH]]
+; CHECK: [[OUTER2_LATCH]]:
+; CHECK-NEXT: [[IV_NEXT75]] = add nuw nsw i64 [[IV74]], 1
+; CHECK-NEXT: [[EXITCOND77:%.*]] = icmp eq i64 [[IV_NEXT75]], [[WIDE_TRIP_COUNT76]]
+; CHECK-NEXT: [[IV_NEXT67]] = add nuw nsw i64 [[IV66]], 1
+; CHECK-NEXT: [[EXITCOND69:%.*]] = icmp eq i64 [[IV_NEXT67]], [[WIDE_TRIP_COUNT76]]
+; CHECK-NEXT: br i1 [[EXITCOND69]], label %[[OUTER2_EXIT:.*]], label %[[OUTER1_BODY_INNER_GUARD]]
+; CHECK: [[OUTER2_EXIT]]:
+; CHECK-NEXT: br label %[[FUNC_EXIT]]
+; CHECK: [[FUNC_EXIT]]:
+; CHECK-NEXT: ret i32 undef
+;
entry:
%cmp63 = icmp sgt i32 %m, 0
br i1 %cmp63, label %outer1.ph, label %func_exit
diff --git a/llvm/test/Transforms/LoopFusion/four_loops.ll b/llvm/test/Transforms/LoopFusion/four_loops.ll
index 7f7f0f19b59ba..1728686ebc15c 100644
--- a/llvm/test/Transforms/LoopFusion/four_loops.ll
+++ b/llvm/test/Transforms/LoopFusion/four_loops.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s | FileCheck %s
@A = common global [1024 x i32] zeroinitializer, align 16
@@ -5,21 +6,77 @@
@C = common global [1024 x i32] zeroinitializer, align 16
@D = common global [1024 x i32] zeroinitializer, align 16
-; CHECK: void @dep_free
-; CHECK-NEXT: bb:
-; CHECK-NEXT: br label %[[LOOP1HEADER:bb[0-9]+]]
-; CHECK: [[LOOP1HEADER]]
-; CHECK: br label %[[LOOP2BODY:bb[0-9]+]]
-; CHECK: [[LOOP2BODY]]
-; CHECK: br label %[[LOOP3BODY:bb[0-9]+]]
-; CHECK: [[LOOP3BODY]]
-; CHECK: br label %[[LOOP4BODY:bb[0-9]+]]
-; CHECK: [[LOOP4BODY]]
-; CHECK: br label %[[LOOP1LATCH:bb[0-9]+]]
-; CHECK: [[LOOP1LATCH]]
-; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %[[LOOPEXIT:bb[0-9]+]]
-; CHECK: ret void
define void @dep_free() {
+; CHECK-LABEL: define void @dep_free() {
+; CHECK-NEXT: [[BB:.*]]:
+; CHECK-NEXT: br label %[[BB15:.*]]
+; CHECK: [[BB15]]:
+; CHECK-NEXT: [[DOT08:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP23:%.*]], %[[BB61:.*]] ]
+; CHECK-NEXT: [[INDVARS_IV107:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT11:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[DOT016:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP36:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[INDVARS_IV75:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT8:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[DOT024:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP49:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[INDVARS_IV43:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT5:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[DOT032:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP62:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[BB61]] ]
+; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT08]], -3
+; CHECK-NEXT: [[TMP16:%.*]] = add nuw nsw i64 [[INDVARS_IV107]], 3
+; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP16]] to i32
+; CHECK-NEXT: [[TMP18:%.*]] = mul nsw i32 [[TMP]], [[TMP17]]
+; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[INDVARS_IV107]] to i32
+; CHECK-NEXT: [[TMP20:%.*]] = srem i32 [[TMP18]], [[TMP19]]
+; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1024 x i32], ptr @A, i64 0, i64 [[INDVARS_IV107]]
+; CHECK-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4
+; CHECK-NEXT: br label %[[BB22:.*]]
+; CHECK: [[BB22]]:
+; CHECK-NEXT: [[TMP28:%.*]] = add nsw i32 [[DOT016]], -3
+; CHECK-NEXT: [[TMP29:%.*]] = add nuw nsw i64 [[INDVARS_IV75]], 3
+; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[TMP29]] to i32
+; CHECK-NEXT: [[TMP31:%.*]] = mul nsw i32 [[TMP28]], [[TMP30]]
+; CHECK-NEXT: [[TMP32:%.*]] = trunc i64 [[INDVARS_IV75]] to i32
+; CHECK-NEXT: [[TMP33:%.*]] = srem i32 [[TMP31]], [[TMP32]]
+; CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 [[INDVARS_IV75]]
+; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP34]], align 4
+; CHECK-NEXT: br label %[[BB35:.*]]
+; CHECK: [[BB35]]:
+; CHECK-NEXT: [[TMP41:%.*]] = add nsw i32 [[DOT024]], -3
+; CHECK-NEXT: [[TMP42:%.*]] = add nuw nsw i64 [[INDVARS_IV43]], 3
+; CHECK-NEXT: [[TMP43:%.*]] = trunc i64 [[TMP42]] to i32
+; CHECK-NEXT: [[TMP44:%.*]] = mul nsw i32 [[TMP41]], [[TMP43]]
+; CHECK-NEXT: [[TMP45:%.*]] = trunc i64 [[INDVARS_IV43]] to i32
+; CHECK-NEXT: [[TMP46:%.*]] = srem i32 [[TMP44]], [[TMP45]]
+; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds [1024 x i32], ptr @C, i64 0, i64 [[INDVARS_IV43]]
+; CHECK-NEXT: store i32 [[TMP46]], ptr [[TMP47]], align 4
+; CHECK-NEXT: br label %[[BB48:.*]]
+; CHECK: [[BB48]]:
+; CHECK-NEXT: [[TMP54:%.*]] = add nsw i32 [[DOT032]], -3
+; CHECK-NEXT: [[TMP55:%.*]] = add nuw nsw i64 [[INDVARS_IV1]], 3
+; CHECK-NEXT: [[TMP56:%.*]] = trunc i64 [[TMP55]] to i32
+; CHECK-NEXT: [[TMP57:%.*]] = mul nsw i32 [[TMP54]], [[TMP56]]
+; CHECK-NEXT: [[TMP58:%.*]] = trunc i64 [[INDVARS_IV1]] to i32
+; CHECK-NEXT: [[TMP59:%.*]] = srem i32 [[TMP57]], [[TMP58]]
+; CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1024 x i32], ptr @D, i64 0, i64 [[INDVARS_IV1]]
+; CHECK-NEXT: store i32 [[TMP59]], ptr [[TMP60]], align 4
+; CHECK-NEXT: br label %[[BB61]]
+; CHECK: [[BB52:.*]]:
+; CHECK-NEXT: br label %[[BB63:.*]]
+; CHECK: [[BB61]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT11]] = add nuw nsw i64 [[INDVARS_IV107]], 1
+; CHECK-NEXT: [[TMP23]] = add nuw nsw i32 [[DOT08]], 1
+; CHECK-NEXT: [[EXITCOND12:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT11]], 100
+; CHECK-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV75]], 1
+; CHECK-NEXT: [[TMP36]] = add nuw nsw i32 [[DOT016]], 1
+; CHECK-NEXT: [[EXITCOND9:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT8]], 100
+; CHECK-NEXT: [[INDVARS_IV_NEXT5]] = add nuw nsw i64 [[INDVARS_IV43]], 1
+; CHECK-NEXT: [[TMP49]] = add nuw nsw i32 [[DOT024]], 1
+; CHECK-NEXT: [[EXITCOND6:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT5]], 100
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
+; CHECK-NEXT: [[TMP62]] = add nuw nsw i32 [[DOT032]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[BB15]], label %[[BB52]]
+; CHECK: [[BB63]]:
+; CHECK-NEXT: ret void
+;
bb:
br label %bb15
diff --git a/llvm/test/Transforms/LoopFusion/guarded_peel.ll b/llvm/test/Transforms/LoopFusion/guarded_peel.ll
index c45772b0b0293..c26935908d4d6 100644
--- a/llvm/test/Transforms/LoopFusion/guarded_peel.ll
+++ b/llvm/test/Transforms/LoopFusion/guarded_peel.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion -loop-fusion-peel-max-count=3 < %s | FileCheck %s
; Tests if we are able to fuse two guarded loops which have constant but
@@ -6,33 +7,75 @@
@B = common global [1024 x i32] zeroinitializer, align 16
-; CHECK-LABEL: void @main(ptr noalias %A)
-; CHECK-NEXT: entry:
-; CHECK: br i1 %cmp4, label %for.first.entry, label %for.end
-; CHECK: for.first.entry
-; CHECK-NEXT: br label %for.first.peel.begin
-; CHECK: for.first.peel.begin:
-; CHECK-NEXT: br label %for.first.peel
-; CHECK: for.first.peel:
-; CHECK: br label %for.first.peel.next
-; CHECK: for.first.peel.next:
-; CHECK-NEXT: br label %for.first.peel2
-; CHECK: for.first.peel2:
-; CHECK: br label %for.first.peel.next1
-; CHECK: for.first.peel.next1:
-; CHECK-NEXT: br label %for.first.peel.next11
-; CHECK: for.first.peel.next11:
-; CHECK-NEXT: br label %for.first.entry.peel.newph
-; CHECK: for.first.entry.peel.newph:
-; CHECK: br label %for.first
-; CHECK: for.first:
-; CHECK: br i1 %cmp3, label %for.first, label %for.second.exit
-; CHECK: for.second.exit:
-; CHECK: br label %for.end
-; CHECK: for.end:
-; CHECK-NEXT: ret void
define void @main(ptr noalias %A) {
+; CHECK-LABEL: define void @main(
+; CHECK-SAME: ptr noalias [[A:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i64 0, 45
+; CHECK-NEXT: [[CMP31:%.*]] = icmp slt i64 2, 45
+; CHECK-NEXT: br i1 [[CMP4]], label %[[FOR_FIRST_ENTRY:.*]], label %[[FOR_END:.*]]
+; CHECK: [[FOR_FIRST_ENTRY]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_BEGIN:.*]]
+; CHECK: [[FOR_FIRST_PEEL_BEGIN]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL:.*]]
+; CHECK: [[FOR_FIRST_PEEL]]:
+; CHECK-NEXT: [[SUB_PEEL:%.*]] = sub nsw i64 0, 3
+; CHECK-NEXT: [[ADD_PEEL:%.*]] = add nsw i64 0, 3
+; CHECK-NEXT: [[MUL_PEEL:%.*]] = mul nsw i64 [[SUB_PEEL]], [[ADD_PEEL]]
+; CHECK-NEXT: [[REM_PEEL:%.*]] = srem i64 [[MUL_PEEL]], 0
+; CHECK-NEXT: [[CONV_PEEL:%.*]] = trunc i64 [[REM_PEEL]] to i32
+; CHECK-NEXT: [[ARRAYIDX_PEEL:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 0
+; CHECK-NEXT: store i32 [[CONV_PEEL]], ptr [[ARRAYIDX_PEEL]], align 4
+; CHECK-NEXT: [[INC_PEEL:%.*]] = add nsw i64 0, 1
+; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp slt i64 [[INC_PEEL]], 45
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL2:.*]]
+; CHECK: [[FOR_FIRST_PEEL2]]:
+; CHECK-NEXT: [[SUB_PEEL3:%.*]] = sub nsw i64 [[INC_PEEL]], 3
+; CHECK-NEXT: [[ADD_PEEL4:%.*]] = add nsw i64 [[INC_PEEL]], 3
+; CHECK-NEXT: [[MUL_PEEL5:%.*]] = mul nsw i64 [[SUB_PEEL3]], [[ADD_PEEL4]]
+; CHECK-NEXT: [[REM_PEEL6:%.*]] = srem i64 [[MUL_PEEL5]], [[INC_PEEL]]
+; CHECK-NEXT: [[CONV_PEEL7:%.*]] = trunc i64 [[REM_PEEL6]] to i32
+; CHECK-NEXT: [[ARRAYIDX_PEEL8:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INC_PEEL]]
+; CHECK-NEXT: store i32 [[CONV_PEEL7]], ptr [[ARRAYIDX_PEEL8]], align 4
+; CHECK-NEXT: [[INC_PEEL9:%.*]] = add nsw i64 [[INC_PEEL]], 1
+; CHECK-NEXT: [[CMP_PEEL10:%.*]] = icmp slt i64 [[INC_PEEL9]], 45
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT1:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT1]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT11:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT11]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_ENTRY_PEEL_NEWPH:.*]]
+; CHECK: [[FOR_FIRST_ENTRY_PEEL_NEWPH]]:
+; CHECK-NEXT: br label %[[FOR_FIRST:.*]]
+; CHECK: [[FOR_FIRST]]:
+; CHECK-NEXT: [[I_05:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_FIRST]] ], [ [[INC_PEEL9]], %[[FOR_FIRST_ENTRY_PEEL_NEWPH]] ]
+; CHECK-NEXT: [[I1_02:%.*]] = phi i64 [ [[INC14:%.*]], %[[FOR_FIRST]] ], [ 2, %[[FOR_FIRST_ENTRY_PEEL_NEWPH]] ]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[I_05]], 3
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[I_05]], 3
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[SUB]], [[ADD]]
+; CHECK-NEXT: [[REM:%.*]] = srem i64 [[MUL]], [[I_05]]
+; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[REM]] to i32
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I_05]]
+; CHECK-NEXT: store i32 [[CONV]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INC]] = add nsw i64 [[I_05]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INC]], 45
+; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i64 [[I1_02]], 3
+; CHECK-NEXT: [[ADD8:%.*]] = add nsw i64 [[I1_02]], 3
+; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i64 [[SUB7]], [[ADD8]]
+; CHECK-NEXT: [[REM10:%.*]] = srem i64 [[MUL9]], [[I1_02]]
+; CHECK-NEXT: [[CONV11:%.*]] = trunc i64 [[REM10]] to i32
+; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 [[I1_02]]
+; CHECK-NEXT: store i32 [[CONV11]], ptr [[ARRAYIDX12]], align 4
+; CHECK-NEXT: [[INC14]] = add nsw i64 [[I1_02]], 1
+; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i64 [[INC14]], 45
+; CHECK-NEXT: br i1 [[CMP3]], label %[[FOR_FIRST]], label %[[FOR_SECOND_EXIT:.*]]
+; CHECK: [[FOR_SECOND_EXIT]]:
+; CHECK-NEXT: br label %[[FOR_END]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
%cmp4 = icmp slt i64 0, 45
br i1 %cmp4, label %for.first.entry, label %for.second.guard
diff --git a/llvm/test/Transforms/LoopFusion/guarded_unsafeblock_peel.ll b/llvm/test/Transforms/LoopFusion/guarded_unsafeblock_peel.ll
index 1ab9e538a3dcb..add32738bc5a7 100644
--- a/llvm/test/Transforms/LoopFusion/guarded_unsafeblock_peel.ll
+++ b/llvm/test/Transforms/LoopFusion/guarded_unsafeblock_peel.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion -loop-fusion-peel-max-count=3 < %s | FileCheck %s
; Tests that we do not fuse two guarded loops together.
@@ -6,28 +7,42 @@
; loops unsafe to fuse together.
; The expected output of this test is the function as below.
-; CHECK-LABEL: void @unsafe_exitblock(ptr noalias %A, ptr noalias %B)
-; CHECK: for.first.guard
-; CHECK: br i1 %cmp3, label %for.first.preheader, label %for.second.guard
-; CHECK: for.first.preheader:
-; CHECK-NEXT: br label %for.first
-; CHECK: for.first:
-; CHECK: br i1 %cmp, label %for.first, label %for.first.exit
-; CHECK: for.first.exit:
-; CHECK-NEXT: call void @bar()
-; CHECK-NEXT: br label %for.second.guard
-; CHECK: for.second.guard:
-; CHECK: br i1 %cmp21, label %for.second.preheader, label %for.end
-; CHECK: for.second.preheader:
-; CHECK-NEXT: br label %for.second
-; CHECK: for.second:
-; CHECK: br i1 %cmp2, label %for.second, label %for.second.exit
-; CHECK: for.second.exit:
-; CHECK-NEXT: br label %for.end
-; CHECK: for.end:
-; CHECK-NEXT: ret void
define void @unsafe_exitblock(ptr noalias %A, ptr noalias %B) {
+; CHECK-LABEL: define void @unsafe_exitblock(
+; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {
+; CHECK-NEXT: [[FOR_FIRST_GUARD:.*:]]
+; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i64 0, 45
+; CHECK-NEXT: br i1 [[CMP3]], label %[[FOR_FIRST_PREHEADER:.*]], label %[[FOR_SECOND_GUARD:.*]]
+; CHECK: [[FOR_FIRST_PREHEADER]]:
+; CHECK-NEXT: br label %[[FOR_FIRST:.*]]
+; CHECK: [[FOR_FIRST]]:
+; CHECK-NEXT: [[I_04:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_FIRST]] ], [ 0, %[[FOR_FIRST_PREHEADER]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I_04]]
+; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INC]] = add nsw i64 [[I_04]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INC]], 45
+; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_FIRST]], label %[[FOR_FIRST_EXIT:.*]]
+; CHECK: [[FOR_FIRST_EXIT]]:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: br label %[[FOR_SECOND_GUARD]]
+; CHECK: [[FOR_SECOND_GUARD]]:
+; CHECK-NEXT: [[CMP21:%.*]] = icmp slt i64 2, 45
+; CHECK-NEXT: br i1 [[CMP21]], label %[[FOR_SECOND_PREHEADER:.*]], label %[[FOR_END:.*]]
+; CHECK: [[FOR_SECOND_PREHEADER]]:
+; CHECK-NEXT: br label %[[FOR_SECOND:.*]]
+; CHECK: [[FOR_SECOND]]:
+; CHECK-NEXT: [[J_02:%.*]] = phi i64 [ [[INC6:%.*]], %[[FOR_SECOND]] ], [ 2, %[[FOR_SECOND_PREHEADER]] ]
+; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[J_02]]
+; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX4]], align 4
+; CHECK-NEXT: [[INC6]] = add nsw i64 [[J_02]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[INC6]], 45
+; CHECK-NEXT: br i1 [[CMP2]], label %[[FOR_SECOND]], label %[[FOR_SECOND_EXIT:.*]]
+; CHECK: [[FOR_SECOND_EXIT]]:
+; CHECK-NEXT: br label %[[FOR_END]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
for.first.guard:
%cmp3 = icmp slt i64 0, 45
br i1 %cmp3, label %for.first.preheader, label %for.second.guard
diff --git a/llvm/test/Transforms/LoopFusion/hoist_preheader.ll b/llvm/test/Transforms/LoopFusion/hoist_preheader.ll
index 433090fbd994d..89698f5cc8060 100644
--- a/llvm/test/Transforms/LoopFusion/hoist_preheader.ll
+++ b/llvm/test/Transforms/LoopFusion/hoist_preheader.ll
@@ -1,16 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s | FileCheck %s
define void @hoist_preheader(i32 %N) {
-
-; CHECK:pre1:
-; CHECK-NEXT: %hoistme = add i32 1, %N
-; CHECK-NEXT: %hoistme2 = add i32 1, %hoistme
-; CHECK-NEXT: br label %body1
+; CHECK-LABEL: define void @hoist_preheader(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[PRE1:.*]]:
+; CHECK-NEXT: [[HOISTME:%.*]] = add i32 1, [[N]]
+; CHECK-NEXT: [[HOISTME2:%.*]] = add i32 1, [[HOISTME]]
+; CHECK-NEXT: br label %[[BODY1:.*]]
+; CHECK: [[BODY1]]:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], %[[BODY1]] ], [ 0, %[[PRE1]] ]
+; CHECK-NEXT: [[I2:%.*]] = phi i32 [ [[I_NEXT2:%.*]], %[[BODY1]] ], [ 0, %[[PRE1]] ]
+; CHECK-NEXT: [[I_NEXT]] = add i32 1, [[I]]
+; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[I]], [[N]]
+; CHECK-NEXT: [[I_NEXT2]] = add i32 1, [[I2]]
+; CHECK-NEXT: [[COND2:%.*]] = icmp ne i32 [[I2]], [[N]]
+; CHECK-NEXT: br i1 [[COND2]], label %[[BODY1]], label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
pre1:
br label %body1
-; CHECK: body1:
-; CHECK-NOT: %hoistme
body1: ; preds = %pre1, %body1
%i = phi i32 [%i_next, %body1], [0, %pre1]
%i_next = add i32 1, %i
diff --git a/llvm/test/Transforms/LoopFusion/inner_loops.ll b/llvm/test/Transforms/LoopFusion/inner_loops.ll
index 3c90905339fa7..88ac6621baff2 100644
--- a/llvm/test/Transforms/LoopFusion/inner_loops.ll
+++ b/llvm/test/Transforms/LoopFusion/inner_loops.ll
@@ -1,26 +1,66 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s 2>&1 | FileCheck %s
@A = common global [1024 x [1024 x i32]] zeroinitializer, align 16
@B = common global [1024 x [1024 x i32]] zeroinitializer, align 16
-; CHECK: void @dep_free
-; CHECK-NEXT: bb:
-; CHECK-NEXT: br label %[[LOOP1HEADER:bb[0-9]*]]
-; CHECK: [[LOOP1HEADER]]
-; CHECK: br i1 %{{.*}}, label %[[LOOP1BODY:bb[0-9]*]], label %[[LOOP2PREHEADER:bb[0-9]+]]
-; CHECK: [[LOOP1BODY]]
-; CHECK: br label %[[LOOP1LATCH:bb[0-9]*]]
-; CHECK: [[LOOP1LATCH]]
-; CHECK: br label %[[LOOP2PREHEADER:bb[0-9]+]]
-; CHECK: [[LOOP2PREHEADER]]
-; CHECK: br i1 %{{.*}}, label %[[LOOP2BODY:bb[0-9]*]], label %[[LOOP2EXIT:bb[0-9]*]]
-; CHECK: [[LOOP2BODY]]
-; CHECK: br label %[[LOOP2LATCH:bb[0-9]+]]
-; CHECK: [[LOOP2LATCH]]
-; CHECK: br label %[[LOOP1HEADER]]
-; CHECK: ret void
define void @dep_free() {
+; CHECK-LABEL: define void @dep_free() {
+; CHECK-NEXT: [[BB:.*]]:
+; CHECK-NEXT: br label %[[BB9:.*]]
+; CHECK: [[BB9]]:
+; CHECK-NEXT: [[INDVARS_IV6:%.*]] = phi i64 [ [[INDVARS_IV_NEXT7:%.*]], %[[BB35:.*]] ], [ 0, %[[BB]] ]
+; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP36:%.*]], %[[BB35]] ]
+; CHECK-NEXT: [[EXITCOND8:%.*]] = icmp ne i64 [[INDVARS_IV6]], 100
+; CHECK-NEXT: br i1 [[EXITCOND8]], label %[[BB11:.*]], label %[[BB10:.*]]
+; CHECK: [[BB10]]:
+; CHECK-NEXT: br label %[[BB37:.*]]
+; CHECK: [[BB11]]:
+; CHECK-NEXT: br label %[[BB12:.*]]
+; CHECK: [[BB12]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[BB21:.*]] ], [ 0, %[[BB11]] ]
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[BB14:.*]], label %[[BB23_PREHEADER:.*]]
+; CHECK: [[BB23_PREHEADER]]:
+; CHECK-NEXT: br label %[[BB23:.*]]
+; CHECK: [[BB14]]:
+; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT0]], -3
+; CHECK-NEXT: [[TMP15:%.*]] = add nuw nsw i64 [[INDVARS_IV6]], 3
+; CHECK-NEXT: [[TMP16:%.*]] = trunc i64 [[TMP15]] to i32
+; CHECK-NEXT: [[TMP17:%.*]] = mul nsw i32 [[TMP]], [[TMP16]]
+; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[INDVARS_IV6]] to i32
+; CHECK-NEXT: [[TMP19:%.*]] = srem i32 [[TMP17]], [[TMP18]]
+; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1024 x [1024 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV6]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store i32 [[TMP19]], ptr [[TMP20]], align 4
+; CHECK-NEXT: br label %[[BB21]]
+; CHECK: [[BB21]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: br label %[[BB12]]
+; CHECK: [[BB23]]:
+; CHECK-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], %[[BB33:.*]] ], [ 0, %[[BB23_PREHEADER]] ]
+; CHECK-NEXT: [[EXITCOND5:%.*]] = icmp ne i64 [[INDVARS_IV3]], 100
+; CHECK-NEXT: br i1 [[EXITCOND5]], label %[[BB25:.*]], label %[[BB35]]
+; CHECK: [[BB25]]:
+; CHECK-NEXT: [[TMP26:%.*]] = add nsw i32 [[DOT0]], -3
+; CHECK-NEXT: [[TMP27:%.*]] = add nuw nsw i64 [[INDVARS_IV6]], 3
+; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[TMP27]] to i32
+; CHECK-NEXT: [[TMP29:%.*]] = mul nsw i32 [[TMP26]], [[TMP28]]
+; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[INDVARS_IV6]] to i32
+; CHECK-NEXT: [[TMP31:%.*]] = srem i32 [[TMP29]], [[TMP30]]
+; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1024 x [1024 x i32]], ptr @B, i64 0, i64 [[INDVARS_IV6]], i64 [[INDVARS_IV3]]
+; CHECK-NEXT: store i32 [[TMP31]], ptr [[TMP32]], align 4
+; CHECK-NEXT: br label %[[BB33]]
+; CHECK: [[BB33]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT4]] = add nuw nsw i64 [[INDVARS_IV3]], 1
+; CHECK-NEXT: br label %[[BB23]]
+; CHECK: [[BB35]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT7]] = add nuw nsw i64 [[INDVARS_IV6]], 1
+; CHECK-NEXT: [[TMP36]] = add nuw nsw i32 [[DOT0]], 1
+; CHECK-NEXT: br label %[[BB9]]
+; CHECK: [[BB37]]:
+; CHECK-NEXT: ret void
+;
bb:
br label %bb9
diff --git a/llvm/test/Transforms/LoopFusion/loop_nest.ll b/llvm/test/Transforms/LoopFusion/loop_nest.ll
index 260e7c86eeed0..39dcd19fb05ab 100644
--- a/llvm/test/Transforms/LoopFusion/loop_nest.ll
+++ b/llvm/test/Transforms/LoopFusion/loop_nest.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s | FileCheck %s
;
; int A[1024][1024];
@@ -19,28 +20,61 @@
@A = common global [1024 x [1024 x i32]] zeroinitializer, align 16
@B = common global [1024 x [1024 x i32]] zeroinitializer, align 16
-; CHECK: void @dep_free
-; CHECK-NEXT: bb:
-; CHECK-NEXT: br label %[[LOOP1HEADER:bb[0-9]+]]
-; CHECK: [[LOOP1HEADER]]
-; CHECK: br label %[[LOOP3HEADER:bb[0-9]+]]
-; CHECK: [[LOOP3HEADER]]
-; CHECK: br label %[[LOOP2HEADER:bb[0-9]+]]
-; CHECK: [[LOOP2HEADER]]
-; CHECK: br label %[[LOOP4HEADER:bb[0-9]+]]
-; CHECK: [[LOOP4HEADER]]
-; CHECK: br i1 %{{.*}}, label %[[LOOP3HEADER]], label %[[LOOP1LATCH:bb[0-9]+]]
-; CHECK: [[LOOP1LATCH]]
-; CHECK-NEXT: %inc.outer.fc0 = add nuw nsw i64 %indvars.iv105, 1
-; CHECK-NEXT: %add.outer.fc0 = add nuw nsw i32 %.06, 1
-; CHECK-NEXT: %cmp.outer.fc0 = icmp ne i64 %inc.outer.fc0, 100
-; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %[[LOOP1EXIT:bb[0-9]*]]
-; CHECK: ret void
; TODO: The current version of loop fusion does not allow the inner loops to be
; fused because they are not control flow equivalent and adjacent. These are
; limitations that can be addressed in future improvements to fusion.
define void @dep_free() {
+; CHECK-LABEL: define void @dep_free() {
+; CHECK-NEXT: [[BB:.*]]:
+; CHECK-NEXT: br label %[[BB16:.*]]
+; CHECK: [[BB16]]:
+; CHECK-NEXT: [[DOT06:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[ADD_OUTER_FC0:%.*]], %[[BB45:.*]] ]
+; CHECK-NEXT: [[INDVARS_IV105:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INC_OUTER_FC0:%.*]], %[[BB45]] ]
+; CHECK-NEXT: [[DOT023:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP46:%.*]], %[[BB45]] ]
+; CHECK-NEXT: [[INDVARS_IV42:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT5:%.*]], %[[BB45]] ]
+; CHECK-NEXT: br label %[[BB18:.*]]
+; CHECK: [[BB18]]:
+; CHECK-NEXT: [[INDVARS_IV74:%.*]] = phi i64 [ 0, %[[BB16]] ], [ [[INDVARS_IV_NEXT8:%.*]], %[[BB43:.*]] ]
+; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 0, %[[BB16]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[BB43]] ]
+; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT06]], -3
+; CHECK-NEXT: [[TMP19:%.*]] = add nuw nsw i64 [[INDVARS_IV105]], 3
+; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
+; CHECK-NEXT: [[TMP21:%.*]] = mul nsw i32 [[TMP]], [[TMP20]]
+; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[INDVARS_IV105]] to i32
+; CHECK-NEXT: [[TMP23:%.*]] = srem i32 [[TMP21]], [[TMP22]]
+; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1024 x [1024 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV105]], i64 [[INDVARS_IV74]]
+; CHECK-NEXT: store i32 [[TMP23]], ptr [[TMP24]], align 4
+; CHECK-NEXT: br label %[[BB25:.*]]
+; CHECK: [[BB25]]:
+; CHECK-NEXT: [[TMP36:%.*]] = add nsw i32 [[DOT023]], -3
+; CHECK-NEXT: [[TMP37:%.*]] = add nuw nsw i64 [[INDVARS_IV42]], 3
+; CHECK-NEXT: [[TMP38:%.*]] = trunc i64 [[TMP37]] to i32
+; CHECK-NEXT: [[TMP39:%.*]] = mul nsw i32 [[TMP36]], [[TMP38]]
+; CHECK-NEXT: [[TMP40:%.*]] = trunc i64 [[INDVARS_IV42]] to i32
+; CHECK-NEXT: [[TMP41:%.*]] = srem i32 [[TMP39]], [[TMP40]]
+; CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1024 x [1024 x i32]], ptr @B, i64 0, i64 [[INDVARS_IV42]], i64 [[INDVARS_IV1]]
+; CHECK-NEXT: store i32 [[TMP41]], ptr [[TMP42]], align 4
+; CHECK-NEXT: br label %[[BB43]]
+; CHECK: [[BB31:.*]]:
+; CHECK-NEXT: br label %[[BB47:.*]]
+; CHECK: [[BB43]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV74]], 1
+; CHECK-NEXT: [[EXITCOND9:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT8]], 100
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[BB18]], label %[[BB45]]
+; CHECK: [[BB45]]:
+; CHECK-NEXT: [[INC_OUTER_FC0]] = add nuw nsw i64 [[INDVARS_IV105]], 1
+; CHECK-NEXT: [[ADD_OUTER_FC0]] = add nuw nsw i32 [[DOT06]], 1
+; CHECK-NEXT: [[CMP_OUTER_FC0:%.*]] = icmp ne i64 [[INC_OUTER_FC0]], 100
+; CHECK-NEXT: [[INDVARS_IV_NEXT5]] = add nuw nsw i64 [[INDVARS_IV42]], 1
+; CHECK-NEXT: [[TMP46]] = add nuw nsw i32 [[DOT023]], 1
+; CHECK-NEXT: [[EXITCOND6:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT5]], 100
+; CHECK-NEXT: br i1 [[EXITCOND6]], label %[[BB16]], label %[[BB31]]
+; CHECK: [[BB47]]:
+; CHECK-NEXT: ret void
+;
bb:
br label %bb16
diff --git a/llvm/test/Transforms/LoopFusion/nonadjacent_peel.ll b/llvm/test/Transforms/LoopFusion/nonadjacent_peel.ll
index 1bc70ef4f3aaf..c9e57b671a5a9 100644
--- a/llvm/test/Transforms/LoopFusion/nonadjacent_peel.ll
+++ b/llvm/test/Transforms/LoopFusion/nonadjacent_peel.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion -loop-fusion-peel-max-count=3 < %s | FileCheck %s
; Tests that we do not fuse these two loops together. These loops do not have
@@ -6,29 +7,57 @@
; peeling).
; The expected output of this test is the function below.
-; CHECK-LABEL: void @function(ptr noalias %arg)
-; CHECK-NEXT: for.first.preheader:
-; CHECK-NEXT: br label %for.first
-; CHECK: for.first:
-; CHECK: br label %for.first.latch
-; CHECK: for.first.latch:
-; CHECK: br i1 %exitcond4, label %for.first, label %for.first.exit
-; CHECK: for.first.exit:
-; CHECK-NEXT: br label %for.next
-; CHECK: for.next:
-; CHECK-NEXT: br label %for.second.preheader
-; CHECK: for.second.preheader:
-; CHECK: br label %for.second
-; CHECK: for.second:
-; CHECK: br label %for.second.latch
-; CHECK: for.second.latch:
-; CHECK: br i1 %exitcond, label %for.second, label %for.end
-; CHECK: for.end:
-; CHECK-NEXT: ret void
@B = common global [1024 x i32] zeroinitializer, align 16
define void @function(ptr noalias %arg) {
+; CHECK-LABEL: define void @function(
+; CHECK-SAME: ptr noalias [[ARG:%.*]]) {
+; CHECK-NEXT: [[FOR_FIRST_PREHEADER:.*]]:
+; CHECK-NEXT: br label %[[FOR_FIRST:.*]]
+; CHECK: [[FOR_FIRST]]:
+; CHECK-NEXT: [[DOT014:%.*]] = phi i32 [ 0, %[[FOR_FIRST_PREHEADER]] ], [ [[TMP15:%.*]], %[[FOR_FIRST_LATCH:.*]] ]
+; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ 0, %[[FOR_FIRST_PREHEADER]] ], [ [[INDVARS_IV_NEXT3:%.*]], %[[FOR_FIRST_LATCH]] ]
+; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT014]], -3
+; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw i64 [[INDVARS_IV23]], 3
+; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32
+; CHECK-NEXT: [[TMP10:%.*]] = mul nsw i32 [[TMP]], [[TMP9]]
+; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[INDVARS_IV23]] to i32
+; CHECK-NEXT: [[TMP12:%.*]] = srem i32 [[TMP10]], [[TMP11]]
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 [[INDVARS_IV23]]
+; CHECK-NEXT: store i32 [[TMP12]], ptr [[TMP13]], align 4
+; CHECK-NEXT: br label %[[FOR_FIRST_LATCH]]
+; CHECK: [[FOR_FIRST_LATCH]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV23]], 1
+; CHECK-NEXT: [[TMP15]] = add nuw nsw i32 [[DOT014]], 1
+; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
+; CHECK-NEXT: br i1 [[EXITCOND4]], label %[[FOR_FIRST]], label %[[FOR_FIRST_EXIT:.*]]
+; CHECK: [[FOR_FIRST_EXIT]]:
+; CHECK-NEXT: br label %[[FOR_NEXT:.*]]
+; CHECK: [[FOR_NEXT]]:
+; CHECK-NEXT: br label %[[FOR_SECOND_PREHEADER:.*]]
+; CHECK: [[FOR_SECOND_PREHEADER]]:
+; CHECK-NEXT: br label %[[FOR_SECOND:.*]]
+; CHECK: [[FOR_SECOND]]:
+; CHECK-NEXT: [[DOT02:%.*]] = phi i32 [ 0, %[[FOR_SECOND_PREHEADER]] ], [ [[TMP28:%.*]], %[[FOR_SECOND_LATCH:.*]] ]
+; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 3, %[[FOR_SECOND_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_SECOND_LATCH]] ]
+; CHECK-NEXT: [[TMP20:%.*]] = add nsw i32 [[DOT02]], -3
+; CHECK-NEXT: [[TMP21:%.*]] = add nuw nsw i64 [[INDVARS_IV1]], 3
+; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
+; CHECK-NEXT: [[TMP23:%.*]] = mul nsw i32 [[TMP20]], [[TMP22]]
+; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[INDVARS_IV1]] to i32
+; CHECK-NEXT: [[TMP25:%.*]] = srem i32 [[TMP23]], [[TMP24]]
+; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 [[INDVARS_IV1]]
+; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP26]], align 4
+; CHECK-NEXT: br label %[[FOR_SECOND_LATCH]]
+; CHECK: [[FOR_SECOND_LATCH]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
+; CHECK-NEXT: [[TMP28]] = add nuw nsw i32 [[DOT02]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_SECOND]], label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
for.first.preheader:
br label %for.first
diff --git a/llvm/test/Transforms/LoopFusion/peel.ll b/llvm/test/Transforms/LoopFusion/peel.ll
index 0ee3a3b068037..e8a4817f4c064 100644
--- a/llvm/test/Transforms/LoopFusion/peel.ll
+++ b/llvm/test/Transforms/LoopFusion/peel.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion -loop-fusion-peel-max-count=3 < %s | FileCheck %s
; Tests whether we can fuse two loops together if they have constant but a
@@ -17,45 +18,106 @@
; B[i] = ((i-6)*(i+3)) % i;
; }
-; CHECK-LABEL: void @function(ptr noalias %arg)
-; CHECK-NEXT: for.first.preheader:
-; CHECK-NEXT: br label %for.first.peel.begin
-; CHECK: for.first.peel.begin:
-; CHECK-NEXT: br label %for.first.peel
-; CHECK: for.first.peel:
-; CHECK: br label %for.first.latch.peel
-; CHECK: for.first.latch.peel:
-; CHECK: br label %for.first.peel.next
-; CHECK: for.first.peel.next:
-; CHECK-NEXT: br label %for.first.peel2
-; CHECK: for.first.peel2:
-; CHECK: br label %for.first.latch.peel10
-; CHECK: for.first.latch.peel10:
-; CHECK: br label %for.first.peel.next1
-; CHECK: for.first.peel.next1:
-; CHECK-NEXT: br label %for.first.peel15
-; CHECK: for.first.peel15:
-; CHECK: br label %for.first.latch.peel23
-; CHECK: for.first.latch.peel23:
-; CHECK: br label %for.first.peel.next14
-; CHECK: for.first.peel.next14:
-; CHECK-NEXT: br label %for.first.peel.next27
-; CHECK: for.first.peel.next27:
-; CHECK-NEXT: br label %for.first.preheader.peel.newph
-; CHECK: for.first.preheader.peel.newph:
-; CHECK-NEXT: br label %for.first
-; CHECK: for.first:
-; CHECK: br label %for.first.latch
-; CHECK: for.first.latch:
-; CHECK: br label %for.second.latch
-; CHECK: for.second.latch:
-; CHECK: br i1 %exitcond, label %for.first, label %for.end
-; CHECK: for.end:
-; CHECK-NEXT: ret void
@B = common global [1024 x i32] zeroinitializer, align 16
define void @function(ptr noalias %arg) {
+; CHECK-LABEL: define void @function(
+; CHECK-SAME: ptr noalias [[ARG:%.*]]) {
+; CHECK-NEXT: [[FOR_FIRST_PREHEADER:.*:]]
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_BEGIN:.*]]
+; CHECK: [[FOR_FIRST_PEEL_BEGIN]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL:.*]]
+; CHECK: [[FOR_FIRST_PEEL]]:
+; CHECK-NEXT: [[TMP_PEEL:%.*]] = add nsw i32 0, -3
+; CHECK-NEXT: [[TMP8_PEEL:%.*]] = add nuw nsw i64 0, 3
+; CHECK-NEXT: [[TMP9_PEEL:%.*]] = trunc i64 [[TMP8_PEEL]] to i32
+; CHECK-NEXT: [[TMP10_PEEL:%.*]] = mul nsw i32 [[TMP_PEEL]], [[TMP9_PEEL]]
+; CHECK-NEXT: [[TMP11_PEEL:%.*]] = trunc i64 0 to i32
+; CHECK-NEXT: [[TMP12_PEEL:%.*]] = srem i32 [[TMP10_PEEL]], [[TMP11_PEEL]]
+; CHECK-NEXT: [[TMP13_PEEL:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 0
+; CHECK-NEXT: store i32 [[TMP12_PEEL]], ptr [[TMP13_PEEL]], align 4
+; CHECK-NEXT: br label %[[FOR_FIRST_LATCH_PEEL:.*]]
+; CHECK: [[FOR_FIRST_LATCH_PEEL]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT3_PEEL:%.*]] = add nuw nsw i64 0, 1
+; CHECK-NEXT: [[TMP15_PEEL:%.*]] = add nuw nsw i32 0, 1
+; CHECK-NEXT: [[EXITCOND4_PEEL:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3_PEEL]], 100
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL2:.*]]
+; CHECK: [[FOR_FIRST_PEEL2]]:
+; CHECK-NEXT: [[TMP_PEEL3:%.*]] = add nsw i32 [[TMP15_PEEL]], -3
+; CHECK-NEXT: [[TMP8_PEEL4:%.*]] = add nuw nsw i64 [[INDVARS_IV_NEXT3_PEEL]], 3
+; CHECK-NEXT: [[TMP9_PEEL5:%.*]] = trunc i64 [[TMP8_PEEL4]] to i32
+; CHECK-NEXT: [[TMP10_PEEL6:%.*]] = mul nsw i32 [[TMP_PEEL3]], [[TMP9_PEEL5]]
+; CHECK-NEXT: [[TMP11_PEEL7:%.*]] = trunc i64 [[INDVARS_IV_NEXT3_PEEL]] to i32
+; CHECK-NEXT: [[TMP12_PEEL8:%.*]] = srem i32 [[TMP10_PEEL6]], [[TMP11_PEEL7]]
+; CHECK-NEXT: [[TMP13_PEEL9:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 [[INDVARS_IV_NEXT3_PEEL]]
+; CHECK-NEXT: store i32 [[TMP12_PEEL8]], ptr [[TMP13_PEEL9]], align 4
+; CHECK-NEXT: br label %[[FOR_FIRST_LATCH_PEEL10:.*]]
+; CHECK: [[FOR_FIRST_LATCH_PEEL10]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT3_PEEL11:%.*]] = add nuw nsw i64 [[INDVARS_IV_NEXT3_PEEL]], 1
+; CHECK-NEXT: [[TMP15_PEEL12:%.*]] = add nuw nsw i32 [[TMP15_PEEL]], 1
+; CHECK-NEXT: [[EXITCOND4_PEEL13:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3_PEEL11]], 100
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT1:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT1]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL15:.*]]
+; CHECK: [[FOR_FIRST_PEEL15]]:
+; CHECK-NEXT: [[TMP_PEEL16:%.*]] = add nsw i32 [[TMP15_PEEL12]], -3
+; CHECK-NEXT: [[TMP8_PEEL17:%.*]] = add nuw nsw i64 [[INDVARS_IV_NEXT3_PEEL11]], 3
+; CHECK-NEXT: [[TMP9_PEEL18:%.*]] = trunc i64 [[TMP8_PEEL17]] to i32
+; CHECK-NEXT: [[TMP10_PEEL19:%.*]] = mul nsw i32 [[TMP_PEEL16]], [[TMP9_PEEL18]]
+; CHECK-NEXT: [[TMP11_PEEL20:%.*]] = trunc i64 [[INDVARS_IV_NEXT3_PEEL11]] to i32
+; CHECK-NEXT: [[TMP12_PEEL21:%.*]] = srem i32 [[TMP10_PEEL19]], [[TMP11_PEEL20]]
+; CHECK-NEXT: [[TMP13_PEEL22:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 [[INDVARS_IV_NEXT3_PEEL11]]
+; CHECK-NEXT: store i32 [[TMP12_PEEL21]], ptr [[TMP13_PEEL22]], align 4
+; CHECK-NEXT: br label %[[FOR_FIRST_LATCH_PEEL23:.*]]
+; CHECK: [[FOR_FIRST_LATCH_PEEL23]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT3_PEEL24:%.*]] = add nuw nsw i64 [[INDVARS_IV_NEXT3_PEEL11]], 1
+; CHECK-NEXT: [[TMP15_PEEL25:%.*]] = add nuw nsw i32 [[TMP15_PEEL12]], 1
+; CHECK-NEXT: [[EXITCOND4_PEEL26:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3_PEEL24]], 100
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT14:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT14]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT27:.*]]
+; CHECK: [[FOR_FIRST_PEEL_NEXT27]]:
+; CHECK-NEXT: br label %[[FOR_FIRST_PREHEADER_PEEL_NEWPH:.*]]
+; CHECK: [[FOR_FIRST_PREHEADER_PEEL_NEWPH]]:
+; CHECK-NEXT: br label %[[FOR_FIRST:.*]]
+; CHECK: [[FOR_FIRST]]:
+; CHECK-NEXT: [[DOT014:%.*]] = phi i32 [ [[TMP15_PEEL25]], %[[FOR_FIRST_PREHEADER_PEEL_NEWPH]] ], [ [[TMP15:%.*]], %[[FOR_SECOND_LATCH:.*]] ]
+; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ [[INDVARS_IV_NEXT3_PEEL24]], %[[FOR_FIRST_PREHEADER_PEEL_NEWPH]] ], [ [[INDVARS_IV_NEXT3:%.*]], %[[FOR_SECOND_LATCH]] ]
+; CHECK-NEXT: [[DOT02:%.*]] = phi i32 [ 0, %[[FOR_FIRST_PREHEADER_PEEL_NEWPH]] ], [ [[TMP28:%.*]], %[[FOR_SECOND_LATCH]] ]
+; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 3, %[[FOR_FIRST_PREHEADER_PEEL_NEWPH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_SECOND_LATCH]] ]
+; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT014]], -3
+; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw i64 [[INDVARS_IV23]], 3
+; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32
+; CHECK-NEXT: [[TMP10:%.*]] = mul nsw i32 [[TMP]], [[TMP9]]
+; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[INDVARS_IV23]] to i32
+; CHECK-NEXT: [[TMP12:%.*]] = srem i32 [[TMP10]], [[TMP11]]
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 [[INDVARS_IV23]]
+; CHECK-NEXT: store i32 [[TMP12]], ptr [[TMP13]], align 4
+; CHECK-NEXT: br label %[[FOR_FIRST_LATCH:.*]]
+; CHECK: [[FOR_FIRST_LATCH]]:
+; CHECK-NEXT: [[TMP20:%.*]] = add nsw i32 [[DOT02]], -3
+; CHECK-NEXT: [[TMP21:%.*]] = add nuw nsw i64 [[INDVARS_IV1]], 3
+; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
+; CHECK-NEXT: [[TMP23:%.*]] = mul nsw i32 [[TMP20]], [[TMP22]]
+; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[INDVARS_IV1]] to i32
+; CHECK-NEXT: [[TMP25:%.*]] = srem i32 [[TMP23]], [[TMP24]]
+; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 [[INDVARS_IV1]]
+; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP26]], align 4
+; CHECK-NEXT: br label %[[FOR_SECOND_LATCH]]
+; CHECK: [[FOR_SECOND_LATCH]]:
+; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV23]], 1
+; CHECK-NEXT: [[TMP15]] = add nuw nsw i32 [[DOT014]], 1
+; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
+; CHECK-NEXT: [[TMP28]] = add nuw nsw i32 [[DOT02]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_FIRST]], label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
for.first.preheader:
br label %for.first
diff --git a/llvm/test/Transforms/LoopFusion/sink_preheader.ll b/llvm/test/Transforms/LoopFusion/sink_preheader.ll
index 7e4559cfc85e3..be416db30da6e 100644
--- a/llvm/test/Transforms/LoopFusion/sink_preheader.ll
+++ b/llvm/test/Transforms/LoopFusion/sink_preheader.ll
@@ -1,19 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s | FileCheck %s
define void @sink_preheader(i32 %N) {
-; CHECK-LABEL: @sink_preheader(
-; CHECK-NEXT: pre1:
-; CHECK-NEXT: br label [[BODY1:%.*]]
-; CHECK: body1:
-; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[BODY1]] ], [ 0, [[PRE1:%.*]] ]
-; CHECK-NEXT: [[I2:%.*]] = phi i32 [ [[I_NEXT2:%.*]], [[BODY1]] ], [ 0, [[PRE1]] ]
+; CHECK-LABEL: define void @sink_preheader(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[PRE1:.*]]:
+; CHECK-NEXT: br label %[[BODY1:.*]]
+; CHECK: [[BODY1]]:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], %[[BODY1]] ], [ 0, %[[PRE1]] ]
+; CHECK-NEXT: [[I2:%.*]] = phi i32 [ [[I_NEXT2:%.*]], %[[BODY1]] ], [ 0, %[[PRE1]] ]
; CHECK-NEXT: [[I_NEXT]] = add i32 1, [[I]]
-; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[I]], [[N:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[I]], [[N]]
; CHECK-NEXT: [[BARRIER:%.*]] = add i32 1, [[N]]
; CHECK-NEXT: [[I_NEXT2]] = add i32 1, [[I2]]
; CHECK-NEXT: [[COND2:%.*]] = icmp ne i32 [[I2]], [[N]]
-; CHECK-NEXT: br i1 [[COND2]], label [[BODY1]], label [[EXIT:%.*]]
-; CHECK: exit:
+; CHECK-NEXT: br i1 [[COND2]], label %[[BODY1]], label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
; CHECK-NEXT: [[SINKME:%.*]] = add i32 1, [[BARRIER]]
; CHECK-NEXT: [[SINKME2:%.*]] = add i32 1, [[BARRIER]]
; CHECK-NEXT: [[SINKME3:%.*]] = add i32 1, [[SINKME2]]
diff --git a/llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll b/llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
index 2ad211685aa47..b2bcdf1679979 100644
--- a/llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
+++ b/llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion < %s 2>&1 | FileCheck %s
; Verify that LoopFusion can fuse two triple-loop nests with guarded inner
@@ -7,25 +8,12 @@
@b = common global [10 x [10 x [10 x i32]]] zeroinitializer
@c = common global [10 x [10 x [10 x i32]]] zeroinitializer
-; CHECK-LABEL: @triple_loop_nest_inner_guard
-; CHECK: br i1 %{{.*}}, label %[[OUTER_PH:outer1.ph]], label %[[FUNC_EXIT:func_exit]]
-; CHECK: [[OUTER_PH]]:
-; CHECK: br label %[[OUTER_BODY_MIDDLE_GUARD:outer1.body.middle1.guard]]
-; CHECK: [[OUTER_BODY_MIDDLE_GUARD]]:
-; CHECK: br i1 %{{.*}}, label %[[MIDDLE_PH:middle1.ph]], label %[[OUTER_LATCH:outer2.latch]]
-; CHECK: [[MIDDLE_PH]]:
-; CHECK-NEXT: br label %[[MIDDLE_BODY_INNER_GUARD:middle1.body.inner1.guard]]
-; CHECK: [[MIDDLE_BODY_INNER_GUARD]]:
-; CHECK: br i1 %{{.*}}, label %[[INNER_PH:inner1.ph]], label %[[MIDDLE_LATCH:middle2.latch]]
-; CHECK: [[INNER_PH]]:
-; CHECK-NEXT: br label %[[INNER_BODY:inner1.body]]
-; CHECK: [[INNER_BODY]]:
; First loop body.
; CHECK: load
; CHECK: add
@@ -34,27 +22,77 @@
; CHECK: load
; CHECK: mul
; CHECK: store
-; CHECK: br i1 %{{.*}}, label %[[INNER_EXIT:inner2.exit]], label %[[INNER_BODY:inner1.body]]
-; CHECK: [[INNER_EXIT]]:
-; CHECK-NEXT: br label %[[MIDDLE_LATCH:middle2.latch]]
-; CHECK: [[MIDDLE_LATCH]]:
-; CHECK: br i1 %{{.*}}, label %[[MIDDLE_EXIT:middle2.exit]], label %[[MIDDLE_BODY_INNER_GUARD]]
-; CHECK: [[MIDDLE_EXIT]]:
-; CHECK-NEXT: br label %[[OUTER_LATCH:outer2.latch]]
-; CHECK: [[OUTER_LATCH]]:
-; CHECK: br i1 %{{.*}}, label %[[OUTER_EXIT:outer2.exit]], label %[[OUTER_BODY_MIDDLE_GUARD]]
-; CHECK: [[OUTER_EXIT]]:
-; CHECK-NEXT: br label %[[FUNC_EXIT:func_exit]]
-; CHECK: [[FUNC_EXIT]]:
-; CHECK-NEXT: ret
define i32 @triple_loop_nest_inner_guard(i32 %m, i32 %n, i32 %M, i32 %N) {
+; CHECK-LABEL: define i32 @triple_loop_nest_inner_guard(
+; CHECK-SAME: i32 [[M:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[CMP101:%.*]] = icmp sgt i32 [[M]], 0
+; CHECK-NEXT: br i1 [[CMP101]], label %[[OUTER1_PH:.*]], label %[[FUNC_EXIT:.*]]
+; CHECK: [[OUTER1_PH]]:
+; CHECK-NEXT: [[CMP298:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: [[CMP696:%.*]] = icmp sgt i32 [[M]], 0
+; CHECK-NEXT: [[WIDE_TRIP_COUNT122:%.*]] = zext i32 [[M]] to i64
+; CHECK-NEXT: [[WIDE_TRIP_COUNT118:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[WIDE_TRIP_COUNT114:%.*]] = zext i32 [[M]] to i64
+; CHECK-NEXT: br label %[[OUTER1_BODY_MIDDLE1_GUARD:.*]]
+; CHECK: [[OUTER1_BODY_MIDDLE1_GUARD]]:
+; CHECK-NEXT: [[IV120:%.*]] = phi i64 [ 0, %[[OUTER1_PH]] ], [ [[IV_NEXT121:%.*]], %[[OUTER2_LATCH:.*]] ]
+; CHECK-NEXT: [[IV108:%.*]] = phi i64 [ [[IV_NEXT109:%.*]], %[[OUTER2_LATCH]] ], [ 0, %[[OUTER1_PH]] ]
+; CHECK-NEXT: br i1 [[CMP298]], label %[[MIDDLE1_PH:.*]], label %[[OUTER2_LATCH]]
+; CHECK: [[MIDDLE1_PH]]:
+; CHECK-NEXT: br label %[[MIDDLE1_BODY_INNER1_GUARD:.*]]
+; CHECK: [[MIDDLE1_BODY_INNER1_GUARD]]:
+; CHECK-NEXT: [[IV116:%.*]] = phi i64 [ [[IV_NEXT117:%.*]], %[[MIDDLE2_LATCH:.*]] ], [ 0, %[[MIDDLE1_PH]] ]
+; CHECK-NEXT: [[IV104:%.*]] = phi i64 [ [[IV_NEXT105:%.*]], %[[MIDDLE2_LATCH]] ], [ 0, %[[MIDDLE1_PH]] ]
+; CHECK-NEXT: br i1 [[CMP696]], label %[[INNER1_PH:.*]], label %[[MIDDLE2_LATCH]]
+; CHECK: [[INNER1_PH]]:
+; CHECK-NEXT: br label %[[INNER1_BODY:.*]]
+; CHECK: [[INNER1_BODY]]:
+; CHECK-NEXT: [[IV112:%.*]] = phi i64 [ [[IV_NEXT113:%.*]], %[[INNER1_BODY]] ], [ 0, %[[INNER1_PH]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[INNER1_BODY]] ], [ 0, %[[INNER1_PH]] ]
+; CHECK-NEXT: [[IDX12:%.*]] = getelementptr inbounds [10 x [10 x [10 x i32]]], ptr @a, i64 0, i64 [[IV120]], i64 [[IV116]], i64 [[IV112]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IDX12]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 2
+; CHECK-NEXT: [[IDX18:%.*]] = getelementptr inbounds [10 x [10 x [10 x i32]]], ptr @b, i64 0, i64 [[IV120]], i64 [[IV116]], i64 [[IV112]]
+; CHECK-NEXT: store i32 [[ADD]], ptr [[IDX18]], align 4
+; CHECK-NEXT: [[IV_NEXT113]] = add nuw nsw i64 [[IV112]], 1
+; CHECK-NEXT: [[EXITCOND115:%.*]] = icmp eq i64 [[IV_NEXT113]], [[WIDE_TRIP_COUNT114]]
+; CHECK-NEXT: [[IDX45:%.*]] = getelementptr inbounds [10 x [10 x [10 x i32]]], ptr @a, i64 0, i64 [[IV108]], i64 [[IV104]], i64 [[IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[IDX45]], align 4
+; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[TMP1]], 1
+; CHECK-NEXT: [[IDX51:%.*]] = getelementptr inbounds [10 x [10 x [10 x i32]]], ptr @c, i64 0, i64 [[IV108]], i64 [[IV104]], i64 [[IV]]
+; CHECK-NEXT: store i32 [[MUL]], ptr [[IDX51]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], [[WIDE_TRIP_COUNT114]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[INNER2_EXIT:.*]], label %[[INNER1_BODY]]
+; CHECK: [[INNER2_EXIT]]:
+; CHECK-NEXT: br label %[[MIDDLE2_LATCH]]
+; CHECK: [[MIDDLE2_LATCH]]:
+; CHECK-NEXT: [[IV_NEXT117]] = add nuw nsw i64 [[IV116]], 1
+; CHECK-NEXT: [[EXITCOND119:%.*]] = icmp eq i64 [[IV_NEXT117]], [[WIDE_TRIP_COUNT118]]
+; CHECK-NEXT: [[IV_NEXT105]] = add nuw nsw i64 [[IV104]], 1
+; CHECK-NEXT: [[EXITCOND107:%.*]] = icmp eq i64 [[IV_NEXT105]], [[WIDE_TRIP_COUNT118]]
+; CHECK-NEXT: br i1 [[EXITCOND107]], label %[[MIDDLE2_EXIT:.*]], label %[[MIDDLE1_BODY_INNER1_GUARD]]
+; CHECK: [[MIDDLE2_EXIT]]:
+; CHECK-NEXT: br label %[[OUTER2_LATCH]]
+; CHECK: [[OUTER2_LATCH]]:
+; CHECK-NEXT: [[IV_NEXT121]] = add nuw nsw i64 [[IV120]], 1
+; CHECK-NEXT: [[EXITCOND123:%.*]] = icmp eq i64 [[IV_NEXT121]], [[WIDE_TRIP_COUNT122]]
+; CHECK-NEXT: [[IV_NEXT109]] = add nuw nsw i64 [[IV108]], 1
+; CHECK-NEXT: [[EXITCOND111:%.*]] = icmp eq i64 [[IV_NEXT109]], [[WIDE_TRIP_COUNT122]]
+; CHECK-NEXT: br i1 [[EXITCOND111]], label %[[OUTER2_EXIT:.*]], label %[[OUTER1_BODY_MIDDLE1_GUARD]]
+; CHECK: [[OUTER2_EXIT]]:
+; CHECK-NEXT: br label %[[FUNC_EXIT]]
+; CHECK: [[FUNC_EXIT]]:
+; CHECK-NEXT: ret i32 undef
+;
entry:
%cmp101 = icmp sgt i32 %m, 0
br i1 %cmp101, label %outer1.ph, label %func_exit
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