[llvm] [LoopVectorize] Peek through bitcasts when performing CSE (PR #146856)
Pedro Lobo via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 3 04:04:22 PDT 2025
https://github.com/pedroclobo created https://github.com/llvm/llvm-project/pull/146856
LoopVectorize performs CSE of induction variable instructions. Add bitcasts to the worklist as well.
>From 3b646c6ca2a294d50144863ee517c09e9ccef417 Mon Sep 17 00:00:00 2001
From: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: Fri, 16 May 2025 13:02:12 +0100
Subject: [PATCH] [LoopVectorize] Peek through bitcasts when performing CSE
LoopVectorize performs CSE of induction variable instructions. Add
bitcasts to the worklist as well.
---
.../Transforms/Vectorize/LoopVectorize.cpp | 3 +-
.../Transforms/LoopVectorize/bitcast-cse.ll | 71 +++++++++++++++++++
2 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/Transforms/LoopVectorize/bitcast-cse.ll
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 67df7a8af098d..81f859b903435 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -2643,7 +2643,8 @@ namespace {
struct CSEDenseMapInfo {
static bool canHandle(const Instruction *I) {
return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
- isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I);
+ isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I) ||
+ isa<BitCastInst>(I);
}
static inline Instruction *getEmptyKey() {
diff --git a/llvm/test/Transforms/LoopVectorize/bitcast-cse.ll b/llvm/test/Transforms/LoopVectorize/bitcast-cse.ll
new file mode 100644
index 0000000000000..698a0d071acfe
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/bitcast-cse.ll
@@ -0,0 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt %s -passes=loop-vectorize -S | FileCheck %s
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @bitcast-cse(i16 %0) {
+; CHECK-LABEL: define i32 @bitcast-cse(
+; CHECK-SAME: i16 [[TMP0:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i16> [[BROADCAST_SPLATINSERT]], <4 x i16> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 16
+; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr null, i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[NEXT_GEP1:%.*]] = getelementptr i8, ptr null, i64 [[TMP1]]
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[BROADCAST_SPLAT]] to <4 x half>
+; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x half> [[TMP2]], <4 x half> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x half> [[TMP3]], <8 x half> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
+; CHECK-NEXT: store <8 x half> [[INTERLEAVED_VEC]], ptr [[NEXT_GEP]], align 1
+; CHECK-NEXT: store <8 x half> [[INTERLEAVED_VEC]], ptr [[NEXT_GEP1]], align 1
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], -9223372036854775808
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br i1 true, label %[[FOR_END_LOOPEXIT909:.*]], label %[[SCALAR_PH]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ null, %[[MIDDLE_BLOCK]] ], [ null, %[[ENTRY]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i64 [ 0, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
+; CHECK-NEXT: br label %[[DO_BODY93_I705:.*]]
+; CHECK: [[DO_BODY93_I705]]:
+; CHECK-NEXT: [[DEST_10_I706:%.*]] = phi ptr [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[ADD_PTR97_I709:%.*]], %[[DO_BODY93_I705]] ]
+; CHECK-NEXT: [[LEN_ADDR_8_I707:%.*]] = phi i64 [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[SUB99_I710:%.*]], %[[DO_BODY93_I705]] ]
+; CHECK-NEXT: store i16 [[TMP0]], ptr [[DEST_10_I706]], align 1
+; CHECK-NEXT: [[ARRAYIDX96_I708:%.*]] = getelementptr i16, ptr [[DEST_10_I706]], i64 1
+; CHECK-NEXT: store half 0xH0000, ptr [[ARRAYIDX96_I708]], align 1
+; CHECK-NEXT: [[ADD_PTR97_I709]] = getelementptr i16, ptr [[DEST_10_I706]], i64 2
+; CHECK-NEXT: [[SUB99_I710]] = add i64 [[LEN_ADDR_8_I707]], -2
+; CHECK-NEXT: [[TOBOOL100_NOT_I711:%.*]] = icmp eq i64 [[SUB99_I710]], 0
+; CHECK-NEXT: br i1 [[TOBOOL100_NOT_I711]], label %[[FOR_END_LOOPEXIT909]], label %[[DO_BODY93_I705]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: [[FOR_END_LOOPEXIT909]]:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %do.body93.i705
+
+do.body93.i705:
+ %dest.10.i706 = phi ptr [ null, %entry ], [ %add.ptr97.i709, %do.body93.i705 ]
+ %len.addr.8.i707 = phi i64 [ 0, %entry ], [ %sub99.i710, %do.body93.i705 ]
+ store i16 %0, ptr %dest.10.i706, align 1
+ %arrayidx96.i708 = getelementptr i16, ptr %dest.10.i706, i64 1
+ store half 0.0, ptr %arrayidx96.i708, align 1
+ %add.ptr97.i709 = getelementptr i16, ptr %dest.10.i706, i64 2
+ %sub99.i710 = add i64 %len.addr.8.i707, -2
+ %tobool100.not.i711 = icmp eq i64 %sub99.i710, 0
+ br i1 %tobool100.not.i711, label %for.end.loopexit909, label %do.body93.i705
+
+for.end.loopexit909:
+ ret i32 0
+}
+;.
+; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
+;.
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