[llvm] [Bitcode] Add abbreviations for additional instructions (PR #146825)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 3 00:27:11 PDT 2025
https://github.com/nikic created https://github.com/llvm/llvm-project/pull/146825
Add abbreviations for icmp/fcmp, store and br, which are the most common instructions that don't have abbreviations yet. This requies increasing the abbreviation size to 5 bits.
This gives about 3-5% bitcode size reductions for the clang build: https://llvm-compile-time-tracker.com/compare_clang.php?from=d74d4ffa3342a97bcdfceae75616c755f83b3ca2&to=e8e45c235a7cd99269f45b86114245cca5da3dd8&stat=size-file&sortBy=absolute-difference
>From c34e1f92a6b8c58c2c1a7a1ac2c39a198f80ec65 Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov at redhat.com>
Date: Wed, 2 Jul 2025 18:27:17 +0200
Subject: [PATCH] [Bitcode] Add abbreviations for additional instructions
Add abbreviations for icmp/fcmp, store and br, which are the most
common instructions that don't have abbreviations yet. This requies
increasing the abbreviation size to 5 bits.
This gives about 3-5% bitcode size reductions for the clang build:
https://llvm-compile-time-tracker.com/compare_clang.php?from=d74d4ffa3342a97bcdfceae75616c755f83b3ca2&to=e8e45c235a7cd99269f45b86114245cca5da3dd8&stat=size-file&sortBy=absolute-difference
---
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 82 +++++++++++++++++--
.../Bitcode/function-encoding-rel-operands.ll | 2 +-
2 files changed, 76 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index 7ad2995fe04e4..336118558f270 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -141,6 +141,7 @@ enum {
// FUNCTION_BLOCK abbrev id's.
FUNCTION_INST_LOAD_ABBREV = bitc::FIRST_APPLICATION_ABBREV,
+ FUNCTION_INST_STORE_ABBREV,
FUNCTION_INST_UNOP_ABBREV,
FUNCTION_INST_UNOP_FLAGS_ABBREV,
FUNCTION_INST_BINOP_ABBREV,
@@ -149,8 +150,12 @@ enum {
FUNCTION_INST_CAST_FLAGS_ABBREV,
FUNCTION_INST_RET_VOID_ABBREV,
FUNCTION_INST_RET_VAL_ABBREV,
+ FUNCTION_INST_BR_UNCOND_ABBREV,
+ FUNCTION_INST_BR_COND_ABBREV,
FUNCTION_INST_UNREACHABLE_ABBREV,
FUNCTION_INST_GEP_ABBREV,
+ FUNCTION_INST_CMP_ABBREV,
+ FUNCTION_INST_CMP_FLAGS_ABBREV,
FUNCTION_DEBUG_RECORD_VALUE_ABBREV,
};
@@ -3197,12 +3202,17 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
case Instruction::FCmp: {
// compare returning Int1Ty or vector of Int1Ty
Code = bitc::FUNC_CODE_INST_CMP2;
- pushValueAndType(I.getOperand(0), InstID, Vals);
+ AbbrevToUse = FUNCTION_INST_CMP_ABBREV;
+ if (pushValueAndType(I.getOperand(0), InstID, Vals))
+ AbbrevToUse = 0;
pushValue(I.getOperand(1), InstID, Vals);
Vals.push_back(cast<CmpInst>(I).getPredicate());
uint64_t Flags = getOptimizationFlags(&I);
- if (Flags != 0)
+ if (Flags != 0) {
Vals.push_back(Flags);
+ if (AbbrevToUse)
+ AbbrevToUse = FUNCTION_INST_CMP_FLAGS_ABBREV;
+ }
break;
}
@@ -3224,11 +3234,13 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
case Instruction::Br:
{
Code = bitc::FUNC_CODE_INST_BR;
+ AbbrevToUse = FUNCTION_INST_BR_UNCOND_ABBREV;
const BranchInst &II = cast<BranchInst>(I);
Vals.push_back(VE.getValueID(II.getSuccessor(0)));
if (II.isConditional()) {
Vals.push_back(VE.getValueID(II.getSuccessor(1)));
pushValue(II.getCondition(), InstID, Vals);
+ AbbrevToUse = FUNCTION_INST_BR_COND_ABBREV;
}
}
break;
@@ -3449,12 +3461,16 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
}
break;
case Instruction::Store:
- if (cast<StoreInst>(I).isAtomic())
+ if (cast<StoreInst>(I).isAtomic()) {
Code = bitc::FUNC_CODE_INST_STOREATOMIC;
- else
+ } else {
Code = bitc::FUNC_CODE_INST_STORE;
- pushValueAndType(I.getOperand(1), InstID, Vals); // ptrty + ptr
- pushValueAndType(I.getOperand(0), InstID, Vals); // valty + val
+ AbbrevToUse = FUNCTION_INST_STORE_ABBREV;
+ }
+ if (pushValueAndType(I.getOperand(1), InstID, Vals)) // ptrty + ptr
+ AbbrevToUse = 0;
+ if (pushValueAndType(I.getOperand(0), InstID, Vals)) // valty + val
+ AbbrevToUse = 0;
Vals.push_back(getEncodedAlign(cast<StoreInst>(I).getAlign()));
Vals.push_back(cast<StoreInst>(I).isVolatile());
if (cast<StoreInst>(I).isAtomic()) {
@@ -3677,7 +3693,7 @@ void ModuleBitcodeWriter::writeFunction(
// in the VST.
FunctionToBitcodeIndex[&F] = Stream.GetCurrentBitNo();
- Stream.EnterSubblock(bitc::FUNCTION_BLOCK_ID, 4);
+ Stream.EnterSubblock(bitc::FUNCTION_BLOCK_ID, 5);
VE.incorporateFunction(F);
SmallVector<unsigned, 64> Vals;
@@ -3952,6 +3968,17 @@ void ModuleBitcodeWriter::writeBlockInfo() {
FUNCTION_INST_LOAD_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
+ {
+ auto Abbv = std::make_shared<BitCodeAbbrev>();
+ Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_STORE));
+ Abbv->Add(ValAbbrevOp); // op1
+ Abbv->Add(ValAbbrevOp); // op0
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 4)); // align
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // volatile
+ if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
+ FUNCTION_INST_STORE_ABBREV)
+ llvm_unreachable("Unexpected abbrev ordering!");
+ }
{ // INST_UNOP abbrev for FUNCTION_BLOCK.
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNOP));
@@ -4029,6 +4056,26 @@ void ModuleBitcodeWriter::writeBlockInfo() {
FUNCTION_INST_RET_VAL_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
+ {
+ auto Abbv = std::make_shared<BitCodeAbbrev>();
+ Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_BR));
+ // TODO: Use different abbrev for absolute value reference (succ0)?
+ Abbv->Add(ValAbbrevOp); // succ0
+ if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
+ FUNCTION_INST_BR_UNCOND_ABBREV)
+ llvm_unreachable("Unexpected abbrev ordering!");
+ }
+ {
+ auto Abbv = std::make_shared<BitCodeAbbrev>();
+ Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_BR));
+ // TODO: Use different abbrev for absolute value references (succ0, succ1)?
+ Abbv->Add(ValAbbrevOp); // succ0
+ Abbv->Add(ValAbbrevOp); // succ1
+ Abbv->Add(ValAbbrevOp); // cond
+ if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
+ FUNCTION_INST_BR_COND_ABBREV)
+ llvm_unreachable("Unexpected abbrev ordering!");
+ }
{ // INST_UNREACHABLE abbrev for FUNCTION_BLOCK.
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNREACHABLE));
@@ -4047,6 +4094,27 @@ void ModuleBitcodeWriter::writeBlockInfo() {
FUNCTION_INST_GEP_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
+ {
+ auto Abbv = std::make_shared<BitCodeAbbrev>();
+ Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_CMP2));
+ Abbv->Add(ValAbbrevOp); // op0
+ Abbv->Add(ValAbbrevOp); // op1
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 6)); // pred
+ if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
+ FUNCTION_INST_CMP_ABBREV)
+ llvm_unreachable("Unexpected abbrev ordering!");
+ }
+ {
+ auto Abbv = std::make_shared<BitCodeAbbrev>();
+ Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_CMP2));
+ Abbv->Add(ValAbbrevOp); // op0
+ Abbv->Add(ValAbbrevOp); // op1
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 6)); // pred
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); // flags
+ if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
+ FUNCTION_INST_CMP_FLAGS_ABBREV)
+ llvm_unreachable("Unexpected abbrev ordering!");
+ }
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE));
diff --git a/llvm/test/Bitcode/function-encoding-rel-operands.ll b/llvm/test/Bitcode/function-encoding-rel-operands.ll
index 84e83c11de361..d107a9c5a313d 100644
--- a/llvm/test/Bitcode/function-encoding-rel-operands.ll
+++ b/llvm/test/Bitcode/function-encoding-rel-operands.ll
@@ -48,7 +48,7 @@ define double @test_float_binops(i32 %a) nounwind {
; between literals and the formal parameters.
; CHECK: INST_GEP {{.*}}
; CHECK: INST_LOAD {{.*}}op0=1 {{.*}}
-; CHECK: INST_CMP2 op0=1 {{.*}}
+; CHECK: INST_CMP2 {{.*}}op0=1 {{.*}}
; CHECK: INST_RET {{.*}}op0=1
define i1 @test_load(i32 %a, {i32, i32}* %ptr) nounwind {
entry:
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