[llvm] [LoongArch] Optimize inserting extracted elements (PR #146018)

[via llvm-commits]

zhaoqi5 wrote:

> This change improves vector_insert for lasx
> 
> ```
> // XVINSGR2VR_{W/D}
> def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm),
>           (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>;
> def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm),
>           (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>;
> 
> def : Pat<(vector_insert v8f32:$vd, FPR32:$fj, uimm3:$imm),
>           (XVINSGR2VR_W $vd, (COPY_TO_REGCLASS FPR32:$fj, GPR), uimm3:$imm)>;
> def : Pat<(vector_insert v4f64:$vd, FPR64:$fj, uimm2:$imm),
>           (XVINSGR2VR_D $vd, (COPY_TO_REGCLASS FPR64:$fj, GPR), uimm2:$imm)>;
> ```
> 
> -->
> 
> ```
> // XVINSGR2VR_{W/D}
> def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm),
>           (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>;
> def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm),
>           (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>;
> 
> // XVINSVE0_{W/D}
> def : Pat<(vector_insert v8f32:$vd, FPR32:$fj, uimm3:$imm),
>           (XVINSVE0_W $vd, (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32), uimm3:$imm)>;
> def : Pat<(vector_insert v4f64:$vd, FPR64:$fj, uimm2:$imm),
>           (XVINSVE0_D $vd, (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64), uimm2:$imm)>;
> ```

The purpose of this pr is mainly to optimize inserting extracted elements from 128 or 256 bits vector. I think we can do this optimization for `vector_insert` in a later patch.

https://github.com/llvm/llvm-project/pull/146018